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* Fix instruction mnemonics for some fp_to_sint operationsAnton Korobeynikov2009-07-161-2/+2
| | | | llvm-svn: 76048
* i32 values are passed extended also on stack. Handle this in generic wayAnton Korobeynikov2009-07-161-23/+24
| | | | llvm-svn: 76047
* We definitely have 1-0 boolsAnton Korobeynikov2009-07-161-0/+1
| | | | llvm-svn: 76046
* Revert the commit, it just hides the real bugAnton Korobeynikov2009-07-168-183/+16
| | | | llvm-svn: 76045
* Out GR128 regclass is not a 'real' i128 one.Anton Korobeynikov2009-07-163-5/+4
| | | | llvm-svn: 76044
* Add missed condbranch opcodesAnton Korobeynikov2009-07-161-5/+29
| | | | llvm-svn: 76043
* Handle bitconvertsAnton Korobeynikov2009-07-163-4/+16
| | | | llvm-svn: 76042
* Unbreak mvi and friends - emit only 'significant' part of the operandAnton Korobeynikov2009-07-162-6/+17
| | | | llvm-svn: 76041
* Expand fp_to_uint tooAnton Korobeynikov2009-07-161-0/+3
| | | | llvm-svn: 76040
* We don't have FP truncstoresAnton Korobeynikov2009-07-161-0/+3
| | | | llvm-svn: 76039
* Expand uint_to_fpAnton Korobeynikov2009-07-161-0/+2
| | | | llvm-svn: 76038
* Emit proper rounding mode for fp_to_sintAnton Korobeynikov2009-07-161-4/+4
| | | | llvm-svn: 76037
* f32/f64 regs are stored on stack if we're short in FP regsAnton Korobeynikov2009-07-161-2/+2
| | | | llvm-svn: 76036
* Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension ↵Anton Korobeynikov2009-07-168-16/+183
| | | | | | side effects llvm-svn: 76035
* Make FP zero to be legal FP immediate via LOAD ZEROAnton Korobeynikov2009-07-162-0/+48
| | | | llvm-svn: 76034
* Loads are not two-address in any wayAnton Korobeynikov2009-07-161-8/+7
| | | | llvm-svn: 76033
* Add LOAD NEGATIVE instructionAnton Korobeynikov2009-07-161-1/+9
| | | | llvm-svn: 76032
* LOAD COMPLEMENT instruction is not really two-addrAnton Korobeynikov2009-07-161-4/+5
| | | | llvm-svn: 76031
* Add multiple add/sub instructionsAnton Korobeynikov2009-07-161-0/+40
| | | | llvm-svn: 76030
* Handle FP callee-saved regsAnton Korobeynikov2009-07-163-51/+102
| | | | llvm-svn: 76029
* Proper FP extloadsAnton Korobeynikov2009-07-162-7/+9
| | | | llvm-svn: 76028
* Add proper PWS impdef'sAnton Korobeynikov2009-07-162-21/+51
| | | | llvm-svn: 76027
* Propagate FP select_cc to dag insertersAnton Korobeynikov2009-07-162-2/+19
| | | | llvm-svn: 76026
* Implement fp_to_sintAnton Korobeynikov2009-07-161-1/+14
| | | | llvm-svn: 76025
* Implement FP regs spills / restoresAnton Korobeynikov2009-07-161-0/+14
| | | | llvm-svn: 76024
* Add fabsAnton Korobeynikov2009-07-161-0/+9
| | | | llvm-svn: 76023
* Add fnegAnton Korobeynikov2009-07-161-0/+8
| | | | llvm-svn: 76022
* We don't have native sine / cosine instructionsAnton Korobeynikov2009-07-161-0/+5
| | | | llvm-svn: 76021
* More sint_to_fp stuffAnton Korobeynikov2009-07-161-0/+7
| | | | llvm-svn: 76020
* Add bunch of FP instructionsAnton Korobeynikov2009-07-163-0/+163
| | | | llvm-svn: 76019
* We don't have any FP extloadsAnton Korobeynikov2009-07-161-0/+7
| | | | llvm-svn: 76018
* Implement all comparisonsAnton Korobeynikov2009-07-164-25/+96
| | | | llvm-svn: 76017
* Add constpool lowering / printingAnton Korobeynikov2009-07-164-2/+35
| | | | llvm-svn: 76016
* Allow FP arguments pass / returnAnton Korobeynikov2009-07-162-21/+39
| | | | llvm-svn: 76015
* Register FP regclassesAnton Korobeynikov2009-07-161-0/+6
| | | | llvm-svn: 76014
* Add FP regsAnton Korobeynikov2009-07-162-20/+89
| | | | llvm-svn: 76013
* Fix fallout from prev. patchAnton Korobeynikov2009-07-161-4/+4
| | | | llvm-svn: 76012
* Provide consistent subreg idx scheme. This (hopefully) fixes remaining ↵Anton Korobeynikov2009-07-164-35/+42
| | | | | | divide problems llvm-svn: 76011
* Use divide single for 32 bit signed dividesAnton Korobeynikov2009-07-162-14/+28
| | | | llvm-svn: 76010
* Add missed operands typesAnton Korobeynikov2009-07-161-0/+6
| | | | llvm-svn: 76009
* Missed part of prev. patchAnton Korobeynikov2009-07-161-1/+3
| | | | llvm-svn: 76008
* Another attempt to fix prologue emissionAnton Korobeynikov2009-07-162-10/+14
| | | | llvm-svn: 76007
* Implement 'large' PIC modelAnton Korobeynikov2009-07-1610-9/+190
| | | | llvm-svn: 76006
* Implement shifts properly (hopefilly - finally!)Anton Korobeynikov2009-07-164-21/+34
| | | | llvm-svn: 76005
* Remove redundand register moveAnton Korobeynikov2009-07-162-21/+15
| | | | llvm-svn: 76004
* Properly handle divides. As a bonus - implement memory versions of them.Anton Korobeynikov2009-07-166-66/+313
| | | | llvm-svn: 76003
* Fix epic fail: full-width muls are not commutable. This unbreaks bunch of ↵Anton Korobeynikov2009-07-161-2/+1
| | | | | | stuff from SingleSource/Benchmarks/Stanford llvm-svn: 76002
* 32 bit rotate is not twoaddr instructionAnton Korobeynikov2009-07-161-2/+1
| | | | llvm-svn: 76001
* 32 bit shifts have only 12 bit displacementsAnton Korobeynikov2009-07-164-5/+42
| | | | llvm-svn: 76000
* Add proper register aliasesAnton Korobeynikov2009-07-162-20/+24
| | | | llvm-svn: 75999
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