summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
...
* Add support for the v1i64 type. This makes better code for this:Bill Wendling2007-03-265-28/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | #include <mmintrin.h> extern __m64 C; void baz(__v2si *A, __v2si *B) { *A = C; _mm_empty(); } We get this: _baz: call "L1$pb" "L1$pb": popl %eax movl L_C$non_lazy_ptr-"L1$pb"(%eax), %eax movq (%eax), %mm0 movl 4(%esp), %eax movq %mm0, (%eax) emms ret GCC gives us this: _baz: pushl %ebx call L3 "L00000000001$pb": L3: popl %ebx subl $8, %esp movl L_C$non_lazy_ptr-"L00000000001$pb"(%ebx), %eax movl (%eax), %edx movl 4(%eax), %ecx movl 16(%esp), %eax movl %edx, (%eax) movl %ecx, 4(%eax) emms addl $8, %esp popl %ebx ret llvm-svn: 35351
* SIGN_EXTEND_INREG requires one extra operand, a ValueType node.Evan Cheng2007-03-261-2/+6
| | | | llvm-svn: 35350
* Test case for PR1271 involving construction of a bad mask to replace aReid Spencer2007-03-261-0/+28
| | | | | | shift instruction. llvm-svn: 35349
* For PR1271:Reid Spencer2007-03-261-1/+1
| | | | | | | | Fix SingleSource/Regression/C/2003-05-21-UnionBitFields.c by changing a getHighBitsSet call to getLowBitsSet call that was incorrectly converted from the original lshr constant expression. llvm-svn: 35348
* Look through bitcast when finding IVs. (Chris' patch really.)Dale Johannesen2007-03-261-0/+10
| | | | llvm-svn: 35347
* Start value symbol tables out small (space for 16 elts), not huge (space for ↵Chris Lattner2007-03-261-1/+1
| | | | | | | | 512). This is particularly useful for the JIT, which lazily deserializes functions. llvm-svn: 35346
* Add "feature" testcase for new switch lowering codeAnton Korobeynikov2007-03-251-0/+32
| | | | llvm-svn: 35345
* Compute getLowBitsSet correctly. Using the complement of a 64-bit valueReid Spencer2007-03-251-4/+5
| | | | | | | | and shifting down without regard for the bitwidth of the APInt can lead to incorrect initialization values. Instead, check for the word size case (to avoid undef results from shift) and then do (1 << loBitsSet) - 1 llvm-svn: 35344
* Add a test case for PR1271 (necessary, but not sufficient).Reid Spencer2007-03-251-0/+9
| | | | llvm-svn: 35343
* For PR1271:Reid Spencer2007-03-251-12/+11
| | | | | | | | | | Remove a use of getLowBitsSet that caused the mask used for replacement of shl/lshr pairs with an AND instruction to be computed incorrectly. Its not clear exactly why this is the case. This solves the disappearing shifts problem, but it doesn't fix Regression/C/2003-05-21-UnionBitFields. It seems there is more going on. llvm-svn: 35342
* implement Transforms/InstCombine/cast2.ll:test3 and PR1263Chris Lattner2007-03-251-1/+21
| | | | llvm-svn: 35341
* new testcaseChris Lattner2007-03-252-1/+8
| | | | llvm-svn: 35340
* Some cleanup from review:Reid Spencer2007-03-251-16/+18
| | | | | | | | | * Don't assume shift amounts are <= 64 bits * Avoid creating an extra APInt in SubOne and AddOne by using -- and ++ * Add another use of getLowBitsSet * Convert a series of if statements to a switch llvm-svn: 35339
* First step of switch lowering refactoring: perform worklist-drivenAnton Korobeynikov2007-03-252-188/+273
| | | | | | strategy, emit JT's where possible. llvm-svn: 35338
* Fix authorshipAnton Korobeynikov2007-03-251-1/+1
| | | | llvm-svn: 35337
* fold constantexprs more aggressively, fixing PR1265Chris Lattner2007-03-251-2/+17
| | | | llvm-svn: 35336
* Refactor several ConstantExpr::getXXX calls with ConstantInt argumentsReid Spencer2007-03-251-27/+40
| | | | | | | | using the facilities of APInt. While this duplicates a tiny fraction of the constant folding code, it also makes the code easier to read and avoids large ConstantExpr overhead for simple, known computations. llvm-svn: 35335
* add a noteChris Lattner2007-03-251-0/+1
| | | | llvm-svn: 35334
* 1. Avoid unnecessary APInt construction if possible.Zhou Sheng2007-03-251-7/+5
| | | | | | | 2. Use isStrictlyPositive() instead of isPositive() in two places where they need APInt value > 0 not only >=0. llvm-svn: 35333
* Implement support for vector operands to inline asm, implementingChris Lattner2007-03-251-4/+16
| | | | | | CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll llvm-svn: 35332
* new testcaseChris Lattner2007-03-251-0/+11
| | | | llvm-svn: 35331
* add a noteChris Lattner2007-03-251-0/+13
| | | | llvm-svn: 35330
* Fix CodeGen/PowerPC/2007-03-24-cntlzd.llChris Lattner2007-03-251-1/+4
| | | | llvm-svn: 35329
* test that the ppc backend can do 64-bit cntlzChris Lattner2007-03-251-0/+13
| | | | llvm-svn: 35328
* implement initial support for the silly X constraint. Testcase here: ↵Chris Lattner2007-03-251-0/+2
| | | | | | CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll llvm-svn: 35327
* new testcaseChris Lattner2007-03-251-0/+9
| | | | llvm-svn: 35326
* Make more uses of getHighBitsSet and get rid of some pointless & of anReid Spencer2007-03-251-12/+12
| | | | | | APInt with its type mask. llvm-svn: 35325
* Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.llChris Lattner2007-03-251-1/+4
| | | | llvm-svn: 35324
* new testcaseChris Lattner2007-03-251-0/+11
| | | | llvm-svn: 35323
* switch TargetLowering::getConstraintType to take the entire constraint,Chris Lattner2007-03-2511-68/+82
| | | | | | not just the first letter. No functionality change. llvm-svn: 35322
* More APIntification:Reid Spencer2007-03-251-24/+24
| | | | | | | | | | | | | | | * Convert the last use of a uint64_t that should have been an APInt. * Change ComputeMaskedBits to have a const reference argument for the Mask so that recursions don't cause unneeded temporaries. This causes temps to be needed in other places (where the mask has to change) but this change optimizes for the recursion which is more frequent. * Remove two instances of &ing a Mask with getAllOnesValue. Its not needed any more because APInt is accurate in its bit computations. * Start using the getLowBitsSet and getHighBits set methods on APInt instead of shifting. This makes it more clear in the code what is going on. llvm-svn: 35321
* Allow the b/h/w/k constraints to be applied to values that have multiple ↵Chris Lattner2007-03-251-1/+4
| | | | | | alternatives, and end up not being registers. llvm-svn: 35320
* enforce the proper range for the i386 N constraint.Chris Lattner2007-03-251-8/+9
| | | | llvm-svn: 35319
* Fix test/CodeGen/X86/2007-03-24-InlineAsmPModifier.llChris Lattner2007-03-251-0/+4
| | | | llvm-svn: 35318
* new testcaseChris Lattner2007-03-251-0/+10
| | | | llvm-svn: 35317
* Fix a typo in a comment.Reid Spencer2007-03-251-1/+1
| | | | llvm-svn: 35316
* Actually, for getHighBitsSet and getLowBitsSet, don't make a 0 bit sizeReid Spencer2007-03-251-2/+6
| | | | | | | | illegal. Instead do the 0 valued construction for the user. This is because the caller may not know (or care to check) that the number of bits set is zero. llvm-svn: 35315
* fix a regression on vector or instructions.Chris Lattner2007-03-241-9/+9
| | | | llvm-svn: 35314
* Make it illegal to set 0 bits in getHighBitsSet and getLowBitsSet. For thatReid Spencer2007-03-241-0/+2
| | | | | | | | they should have used the uint64_t constructor. This avoids causing undefined results via shifts by the word size when the bit width is an exact multiple of the word size. llvm-svn: 35313
* In the getBitsSet function, don't optimize for a common case that isReid Spencer2007-03-241-4/+2
| | | | | | | | | already covered by getLowBitsSet (i.e. when loBits==0). Consequently, remove the default value for loBits and reorder the arguments to the more natural loBits, hiBits order. This makes it more clear that this function is for bit groups in the middle of the bit width and not towards one end or the other. llvm-svn: 35312
* Don't invoke undefined behavior in shifts in the functions getHighBitsSetReid Spencer2007-03-241-6/+6
| | | | | | and getLowBitsSet. llvm-svn: 35311
* Implement the getBitsSet function.Reid Spencer2007-03-241-1/+10
| | | | llvm-svn: 35310
* Remove the last vestiges of this directory.Reid Spencer2007-03-242-6/+0
| | | | llvm-svn: 35309
* Implement the getHighBitsSet and getLowBitsSet functions.Reid Spencer2007-03-241-2/+16
| | | | llvm-svn: 35308
* Get the signs in the right place!Reid Spencer2007-03-241-1/+1
| | | | llvm-svn: 35307
* Fix a link.Reid Spencer2007-03-241-1/+1
| | | | llvm-svn: 35306
* Undo the last change and make this really implement remainder and notReid Spencer2007-03-241-4/+6
| | | | | | | modulus. The previous change was a result of incorrect documentation in the LangRef.html. llvm-svn: 35305
* Flip the srem tests around. Previous commit was to correct an apparentReid Spencer2007-03-247-11/+11
| | | | | | | bug in the srem implementation. Turns out it was a documentation bug instead. llvm-svn: 35304
* Correct the description of srem. remainder follows the dividend not theReid Spencer2007-03-241-4/+6
| | | | | | divisor! llvm-svn: 35303
* Correct the implementation of srem to be remainder, not modulus. The sign ofReid Spencer2007-03-241-2/+2
| | | | | | the result must follow the sign of the divisor. llvm-svn: 35302
OpenPOWER on IntegriCloud