| Commit message (Collapse) | Author | Age | Files | Lines |
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summary is a good candidate to ask. While in theory one could want one-liner printing with a non-one-liner summary, I don't see LLDB as the best place to solve such inner conflicts
llvm-svn: 217641
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llvm-svn: 217639
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This patch is to overload operator+= and operator-= for
{u}{little}{big}{16,32,64}_t.
llvm-svn: 217637
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The register numbers start at 0, so if only 1 register
was used, this was reported as 0.
llvm-svn: 217636
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symbols.
Previously we have only been testing these relocations with external symbols.
<rdar://problem/18308413>
llvm-svn: 217635
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llvm-svn: 217634
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Use llvm::COFF::BigObjMagic insetad of the string literal.
Also checks the version number.
llvm-svn: 217633
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llvm-svn: 217632
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The byte has no endianness, so these types don't make sense.
uint8_t should be used instead.
llvm-svn: 217631
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llvm-svn: 217630
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I.e., teach it about 'sext (zext a to ty) to ty2' => zext a to ty2.
llvm-svn: 217629
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And since it /looked/ like the DwarfStrSectionSym was unused, I tried
removing it - but then it turned out that DwarfStringPool was
reconstructing the same label (and expecting it to have already been
emitted) and uses that.
So I kept it around, but wanted to pass it in to users - since it seemed
a bit silly for DwarfStringPool to have it passed in and returned but
itself have no use for it. The only two users don't handle strings in
both .dwo and .o files so they only ever need the one symbol - no need
to keep it (and have an unused symbol) in the DwarfStringPool used for
fission/.dwo.
Refactor a bunch of accelerator table usage to remove duplication so I
didn't have to touch 4-5 callers.
llvm-svn: 217628
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identify_magic recognized a COFF bigobj as an import library file.
This patch fixes that.
llvm-svn: 217627
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Also make it private as it doesn't have to be protected function.
llvm-svn: 217626
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The main difference is the removal of
std::error_code exists(const Twine &path, bool &result);
It was an horribly redundant interface since a file not existing is also a valid
error_code. Now we have an access function that returns just an error_code. This
is the only function that has to be implemented for Unix and Windows. The
functions can_write, exists and can_execute an now just wrappers.
One still has to be very careful using these function to avoid introducing
race conditions (Time of check to time of use).
llvm-svn: 217625
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* ssize_t isn't defined by default on Windows.
* New public API files need to be defined in a different file for
Windows.
llvm-svn: 217624
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llvm-svn: 217623
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Inline asm may specify 'U' and 'X' constraints to print a 'u' for an
update-form memory reference, or an 'x' for an indexed-form memory
reference. However, these are really only useful in GCC internal code
generation. In inline asm the operand of the memory constraint is
typically just a register containing the address, so 'U' and 'X' make
no sense.
This patch quietly accepts 'U' and 'X' in inline asm patterns, but
otherwise does nothing. If we ever unexpectedly see a non-register,
we'll assert and sort it out afterwards.
I've added a new test for these constraints; the test case should be
used for other asm-constraints changes down the road.
llvm-svn: 217622
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r217556 introduced an operator<<(std::ostream &, StringRef) that seems
to self recurse on some systems, because str.data(), which is a char *,
was being implicitly converted back to StringRef in overload
resolution.
This manifested as SemaCXX/warn-thread-safety-analysis.cpp timing out
in release builds and overflowing the stack in debug builds. One of
the failing systems that saw this is here:
http://lab.llvm.org:8013/builders/clang-x86_64-darwin11-nobootstrap-RAincremental/builds/4636
Using ostream's write method instead of operator<< should get the bots
going again.
llvm-svn: 217621
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Fixes <rdar://problem/18297804>.
llvm-svn: 217620
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off by default, issue a warning if %s directive is used
in formart argument of a function/method declared as
__attribute__((format(CF/NSString, ...)))
To complete rdar://18182443
llvm-svn: 217619
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llvm-svn: 217618
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llvm-svn: 217617
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UBSan is combined with ASan.
llvm-svn: 217616
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preprocessor output
Summary:
cl.exe recognizes /o as a deprecated and undocumented option similar to
/Fe. This patch adds support for this option to clang-cl for /Fe, /Fo
and /Fi. It also ensures that the last option among /o and /F* wins,
if both specified.
This is required at least for building autoconf based software, since
autoconf uses -o to specify the executable output.
This fixes http://llvm.org/PR20894.
Test Plan: The patch includes automated tests.
Reviewers: rnk
Subscribers: cfe-commits
Differential Revision: http://reviews.llvm.org/D5308
llvm-svn: 217615
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In all these cases it looks like the intention was to handle error in a similar
way to the file not existing.
llvm-svn: 217614
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app is interrupted.
The Linux version is marked XFAIL for the moment, fixing next.
Related to http://llvm.org/bugs/show_bug.cgi?id=20908.
llvm-svn: 217613
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llvm-svn: 217612
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llvm-svn: 217611
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Do
(shl (add x, c1), c2) -> (add (shl x, c2), c1 << c2)
This is already done for multiplies, but since multiplies
by powers of two are turned into shifts, we also need
to handle it here.
This might want checks for isLegalAddImmediate to avoid
transforming an add of a legal immediate with one that isn't.
llvm-svn: 217610
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llvm-svn: 217609
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llvm-svn: 217608
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1. DW_FORM_strp and DW_FORM_sec_offset are 64bits for DWARF64 / 32bits for DWARF32
They are different from DW_FORM_addr, whose size is specified in .debug_info
2. Bump DWARF version support form [2,3] to [2,4] in DWARFDebugLine.cpp
3. Fix DWARFDebugLine to support DWARF64
See http://reviews.llvm.org/D5307 for more details.
Reviewed by Greg Clayton and Jason Molenda.
Change by Tong Shen.
llvm-svn: 217607
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llvm-svn: 217606
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and BR24 relocations.
<rdar://problem/18296496>
llvm-svn: 217605
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llvm-svn: 217604
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LLVM_NOEXCEPT was added in r210591.
llvm-svn: 217603
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r189189 implemented AVX512 unpack by essentially performing a 256-bit unpack
between the low and the high 256 bits of src1 into the low part of the
destination and another unpack of the low and high 256 bits of src2 into the
high part of the destination.
I don't think that's how unpack works. AVX512 unpack simply has more 128-bit
lanes but other than it works the same way as AVX. So in each 128-bit lane,
we're always interleaving certain parts of both operands rather different
parts of one of the operands.
E.g. for this:
__v16sf a = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 };
__v16sf b = { 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 };
__v16sf c = __builtin_shufflevector(a, b, 0, 8, 1, 9, 4, 12, 5, 13, 16,
24, 17, 25, 20, 28, 21, 29);
we generated punpcklps (notice how the elements of a and b are not interleaved
in the shuffle). In turn, c was set to this:
0 16 1 17 4 20 5 21 8 24 9 25 12 28 13 29
Obviously this should have just returned the mask vector of the shuffle
vector.
I mostly reverted this change and made sure the original AVX code worked
for 512-bit vectors as well.
Also updated the tests because they matched the logic from the code.
llvm-svn: 217602
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strings.
llvm-svn: 217601
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llvm-svn: 217600
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This is an extension of the change made with r215820:
http://llvm.org/viewvc/llvm-project?view=revision&revision=215820
That patch allowed combining of splatted vector FP constants that are multiplied.
This patch allows combining non-uniform vector FP constants too by relaxing the
check on the type of vector. Also, canonicalize a vector fmul in the
same way that we already do for scalars - if only one operand of the fmul is a
constant, make it operand 1. Otherwise, we miss potential folds.
This fold is also done by -instcombine, but it's possible that extra
fmuls may have been generated during lowering.
Differential Revision: http://reviews.llvm.org/D5254
llvm-svn: 217599
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llvm-svn: 217598
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llvm-svn: 217597
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Refactored the R600_LDS_1A2D class a bit to get it to actually work.
It seemed to be previously unused and broken.
We also have to disable the conversion to the noret variant for now in
R600ISelLowering because the getLDSNoRetOp method only handles 1A1D LDS ops.
Someone can feel free to modify the AMDGPU::getLDSNoRetOp method to
work for more than 1A1D variants of LDS operations. It's being left as a
future TODO for now.
Signed-off-by: Aaron Watry <awatry at gmail.com>
Reviewed-by: Matt Arsenault <matthew.arsenault@amd.com>
llvm-svn: 217596
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Now that the operations are all implemented, we can test this sub-arch here.
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Matt Arsenault <matthew.arsenault@amd.com>
llvm-svn: 217595
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Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Matt Arsenault <matthew.arsenault@amd.com>
llvm-svn: 217594
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Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Matt Arsenault <matthew.arsenault@amd.com>
llvm-svn: 217593
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Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Matt Arsenault <matthew.arsenault@amd.com>
llvm-svn: 217592
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Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Matt Arsenault <matthew.arsenault@amd.com>
llvm-svn: 217591
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Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Matt Arsenault <matthew.arsenault@amd.com>
llvm-svn: 217590
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