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* R600/SI: Fix loads of i1Matt Arsenault2014-04-153-4/+132
| | | | llvm-svn: 206330
* Avoid -Wunused-const-variable warningTobias Grosser2014-04-151-0/+2
| | | | llvm-svn: 206329
* RegionInfo: Do not access a value that was just moved awayTobias Grosser2014-04-151-1/+1
| | | | | | This fixes a regression introduced in r206310. llvm-svn: 206328
* [Allocator] Fold the two templated overloads into a single one withChandler Carruth2014-04-151-17/+4
| | | | | | | a default argument. The allocator interface we're modeling doesn't distinguish between array and non-array allocation. llvm-svn: 206327
* Fix more build errors in Polly after r206310. David caught one of theseChandler Carruth2014-04-152-6/+4
| | | | | | | in r206312, but others don't seem to show up on build bots? Unsure of why, they showed up for me. llvm-svn: 206326
* [Allocator] Remove a really problematic overload. This is very confusingChandler Carruth2014-04-151-8/+0
| | | | | | | | | because there is another (size_t, size_t) overload of Allocator, and the only distinguishing factor is that one is a tempalte and the other isn't. There was only one usage of this and that one was easily converted to carry the alignment constraint in the type itself. llvm-svn: 206325
* [Allocator] Make the ContentCache object actually carry the 8-byteChandler Carruth2014-04-152-12/+19
| | | | | | | | | alignment constraint rather than using the allocator function's over alignment "feature". This was the only use of the "feature" which I plan to remove next. =] Attaching the alignment to the type seems cleaner and more principled anyways. llvm-svn: 206324
* Make FastISel::SelectInstruction return before target specific fast-isel codeAkira Hatanaka2014-04-152-2/+9
| | | | | | | | | | | handles Intrinsic::trap if TargetOptions::TrapFuncName is set. This fixes a bug in which the trap function was not taken into consideration when a program was compiled without optimization (at -O0). <rdar://problem/16291933> llvm-svn: 206323
* CodeGen: Emit warnings for out of date profile data during PGOJustin Bogner2014-04-156-7/+43
| | | | | | | | | This adds a warning that triggers when profile data doesn't match for the source that's being compiled with -fprofile-instr-use=. This fires only once per translation unit, as warning on every mismatched function would be quite noisy. llvm-svn: 206322
* CodeGen: Remove a comment that isn't in the right placeJustin Bogner2014-04-151-4/+0
| | | | | | | This comment also appears elsewhere where it actually makes sense, and it's just confusing here. llvm-svn: 206321
* Move comment back to being next to the thing it's describing.Richard Smith2014-04-151-2/+2
| | | | llvm-svn: 206320
* Add FreeBSD-specific SIGTHR and SIGLIBRT signalsEd Maste2014-04-154-0/+73
| | | | llvm-svn: 206319
* Dependences: Do not fail in case a schedule eliminates all dependencesTobias Grosser2014-04-153-0/+63
| | | | | | | | | | | | | | | | | | | The following example shows a non-parallel loop void f(int a[]) { int i; for (i = 0; i < 10; ++i) A[i] = A[i+5]; } which, in case we import a schedule that limits the iteration domain to 0 <= i < 5, becomes parallel. Previously we crashed in such cases, now we just recognize it as parallel. This fixes http://llvm.org/PR19435 Reported-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com> llvm-svn: 206318
* AST: Respect alignment attributes on typedef'd arraysJustin Bogner2014-04-152-1/+14
| | | | | | | | | When instantiating an array that has an alignment attribute on it, we were looking through the array type and only considering the element type for the resulting alignment. We need to make sure we take the array's requirements into account too. llvm-svn: 206317
* [X86] Improve the lowering of packed shifts by constant build_vector.Andrea Di Biagio2014-04-152-0/+198
| | | | | | | | | | | | | | | | | | | | | | | This patch teaches the backend how to efficiently lower logical and arithmetic packed shifts on both SSE and AVX/AVX2 machines. When possible, instead of scalarizing a vector shift, the backend should try to expand the shift into a sequence of two packed shifts by immedate count followed by a MOVSS/MOVSD. Example (v4i32 (srl A, (build_vector < X, Y, Y, Y>))) Can be rewritten as: (v4i32 (MOVSS (srl A, <Y,Y,Y,Y>), (srl A, <X,X,X,X>))) [with X and Y ConstantInt] The advantage is that the two new shifts from the example would be lowered into X86ISD::VSRLI nodes. This is always cheaper than scalarizing the vector into four scalar shifts plus four pairs of vector insert/extract. llvm-svn: 206316
* [ARM64] Update tests to reflect the change of the default CPU in llvm.Quentin Colombet2014-04-152-2/+2
| | | | llvm-svn: 206314
* [ARM64] Set default CPU to generic instead of cyclone.Quentin Colombet2014-04-1525-34/+32
| | | | llvm-svn: 206313
* Blind fix Polly for r206310David Blaikie2014-04-151-9/+9
| | | | llvm-svn: 206312
* Revert r191049/r191059 as it can produce wrong code (see PR17975).Robert Lougher2014-04-153-97/+4
| | | | | | It has already been reverted on the 3.4 branch in r196521. llvm-svn: 206311
* Use unique_ptr to manage ownership of child Regions within llvm::RegionDavid Blaikie2014-04-154-32/+37
| | | | llvm-svn: 206310
* Honour -ivfsoverlay in ASTUnit to match clangBen Langmuir2014-04-1512-53/+143
| | | | | | | This allows code indexing, etc. to use the VFS in the same way as the compiler. llvm-svn: 206309
* Add lifetime markers for allocas created to hold byval arguments, make themJulien Lerouge2014-04-153-1/+29
| | | | | | appear in the InlineFunctionInfo. llvm-svn: 206308
* Split byval argument initialization so the memcpy(s) are injected at theJulien Lerouge2014-04-151-29/+42
| | | | | | beginning of the first new block after inlining. llvm-svn: 206307
* LTO: Add more loop simplification passes to LTODuncan P. N. Exon Smith2014-04-151-1/+3
| | | | | | | | | Similar to r202051, add missing loop simplification passes to the LTO optimization pipeline. Patch by Rafael Espindola. llvm-svn: 206306
* verify-di: Add back braces for MSVC compatabilityDuncan P. N. Exon Smith2014-04-151-5/+12
| | | | | | | | Fixup after r206300. <rdar://problem/15500563> llvm-svn: 206305
* Replace push_back()s by initializer list for shorter and cleaner code.Eli Bendersky2014-04-151-5/+3
| | | | llvm-svn: 206304
* Add test case for r206302Eli Bendersky2014-04-151-0/+30
| | | | llvm-svn: 206303
* Add support for CUDA __launch_bounds__ attribute to CodeGen.Eli Bendersky2014-04-151-10/+28
| | | | | | | | | | Sema does have a CUDALaunchBoundsAttr, but CodeGen was doing nothing with it. This change translates CUDALaunchBoundsAttr to maxntidx and minctasm metadata, which NVPTX then translates to the correct PTX directives. Patch by Manjunath Kudlur. llvm-svn: 206302
* verify-di: Call debug info verifier from clangDuncan P. N. Exon Smith2014-04-151-0/+2
| | | | | | | | | This is paired with a patch to LLVM that creates a separate pass for verifying debug info. <rdar://problem/15500563> llvm-svn: 206301
* verify-di: Implement DebugInfoVerifierDuncan P. N. Exon Smith2014-04-1510-53/+137
| | | | | | | | | | | | | | | | | | | | | Implement DebugInfoVerifier, which steals verification relying on DebugInfoFinder from Verifier. - Adds LegacyDebugInfoVerifierPassPass, a ModulePass which wraps DebugInfoVerifier. Uses -verify-di command-line flag. - Change verifyModule() to invoke DebugInfoVerifier as well as Verifier. - Add a call to createDebugInfoVerifierPass() wherever there was a call to createVerifierPass(). This implementation as a module pass should sidestep efficiency issues, allowing us to turn debug info verification back on. <rdar://problem/15500563> llvm-svn: 206300
* verify-di: split out VerifierSupportDuncan P. N. Exon Smith2014-04-151-57/+62
| | | | | | | | | Split out assertion and output helpers from Verifier in preparation for writing the DebugInfoVerifier. <rdar://problem/15500563> llvm-svn: 206299
* Fix a comment to match the implementationAlp Toker2014-04-151-1/+1
| | | | llvm-svn: 206298
* Use unique_ptr to manage PassInfo instances in the PassRegistryDavid Blaikie2014-04-151-8/+4
| | | | llvm-svn: 206297
* ARM64: track alignment padding registers on AAPCS targetsTim Northover2014-04-152-1/+23
| | | | | | | | | | This implements clause C.8 of the AAPCS in the front-end, so that Clang accurately knows when the registers run out and it has to insert padding before the stack objects begin. PR19432. llvm-svn: 206296
* Fix assertion when breaking string literals with tab characters.Alexander Kornienko2014-04-152-1/+17
| | | | | | | | | | | | | | Summary: Fixes http://llvm.org/PR19368 Reviewers: djasper, klimek Reviewed By: klimek CC: cfe-commits, klimek Differential Revision: http://reviews.llvm.org/D3379 llvm-svn: 206295
* Mark clang/test/Index/pch-with-errors.c as XFAIL:mingw for now. Investigating.NAKAMURA Takumi2014-04-151-0/+3
| | | | | | This has been failing since r206202. llvm-svn: 206294
* MipsAsmParser.cpp: Fix vg_leak in MipsOperand::CreateMem(). Mem.Base is ↵NAKAMURA Takumi2014-04-151-0/+16
| | | | | | managed by k_Memory itself. llvm-svn: 206293
* MipsAsmParser::ParseRegister(): Be responsible to delete an Operand on a ↵NAKAMURA Takumi2014-04-151-0/+2
| | | | | | temporary Operands. llvm-svn: 206292
* AArch64/ARM64: enable more AArch64 tests on ARM64.Tim Northover2014-04-1519-133/+168
| | | | | | No code changes for this bunch, just some test rejigs. llvm-svn: 206291
* AArch64/ARM64: add missing pattern for extending load.Tim Northover2014-04-152-39/+42
| | | | llvm-svn: 206290
* AArch64/ARM64: only mangle MOVZ/MOVN during encoding when neededTim Northover2014-04-153-9/+31
| | | | | | | | Sometimes we need emit the bits that would actually be a MOVN when producing a relocated MOVZ instruction (don't ask). But not always, a check which ARM64 got wrong until now. llvm-svn: 206289
* AArch64/ARM64: add support for large code-model jump tables.Tim Northover2014-04-153-2/+23
| | | | | | | I've left the MachO CodeGen as it is, there's a reasonable chance it should use the GOT like ConstPools, but I'm not certain. llvm-svn: 206288
* AArch64/ARM64: add patterns for various commutations of FNMADD.Tim Northover2014-04-152-0/+16
| | | | llvm-svn: 206287
* AArch64/ARM64: add half as a storage type on ARM64.Tim Northover2014-04-155-15/+20
| | | | | | | This brings it into line with the AArch64 behaviour and should open the way for certain OpenCL features. llvm-svn: 206286
* AArch64/ARM64: copy patterns for fixed-point conversionsTim Northover2014-04-153-15/+99
| | | | | | | | Code is mostly copied directly across, with a slight extension of the ISelDAGToDAG function so that it can cope with the floating-point constants being behind a litpool. llvm-svn: 206285
* ARM64: add constraints to various FastISel operationsTim Northover2014-04-153-10/+23
| | | | llvm-svn: 206284
* FastISel: constrain the RegClass of operands when emitting instructions.Tim Northover2014-04-153-27/+53
| | | | | | | | | | | ARM64 suffered multiple -verify-machineinstr failures (principally over the xsp/xzr issue) because FastISel was completely ignoring which subset of the general-purpose registers each instruction required. More fixes are coming in ARM64 specific FastISel, but this should cover the generic problems. llvm-svn: 206283
* AArch64/ARM64: add more arm64 lines to AArch64 regression testsTim Northover2014-04-154-19/+39
| | | | llvm-svn: 206282
* AArch64/ARM64: add dp tests from AArch64Tim Northover2014-04-154-11/+19
| | | | llvm-svn: 206281
* [asan] fix the alloctor code to not use opaque data structure, which was ↵Kostya Serebryany2014-04-152-55/+57
| | | | | | larger than needed. This was a leftover of the allocator1=>allocator2 migration; thanks Yuri Gribov for reminding llvm-svn: 206280
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