| Commit message (Collapse) | Author | Age | Files | Lines |
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Thumb one requires that many arithmetic instruction forms have an 'S'
suffix. For Thumb2, the whether the suffix is required or precluded depends
on whether the instruction is in an IT block. Use target parser predicates
to check for these sorts of context-sensitive constraints.
llvm-svn: 137746
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check for a LandingPadInst.
llvm-svn: 137745
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getFirstInsertionPt() returns an iterator to the first insertion point in a
basic block. This is after all PHIs and any other instruction which is required
to be at the top of the basic block (like LandingPadInst).
llvm-svn: 137744
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llvm-svn: 137743
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llvm-svn: 137742
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configuration of the failed tests.
llvm-svn: 137741
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llvm-svn: 137740
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llvm-svn: 137739
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llvm-svn: 137738
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C++ methods for a function depending on how the DWARF was
created. Now we parse the class type from the definition,
and all methods that use DW_AT_specification or DW_AT_abstract_origin
attributes to point to the definition, now won't create
duplicate entries. This is in response to how clang++ creates
much different DWARF than gcc.
llvm-svn: 137737
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llvm-svn: 137736
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The argument is unused, and is a layering violation in any case.
llvm-svn: 137735
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llvm-svn: 137734
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there is no support for native 256-bit shuffles, be more smart in some
cases, for example, when you can extract specific 128-bit parts and use
regular 128-bit shuffles for them. Example:
For this shuffle:
shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32>
<i32 1, i32 0, i32 7, i32 6>
This was expanded to:
vextractf128 $1, %ymm1, %xmm2
vpextrq $0, %xmm2, %rax
vmovd %rax, %xmm1
vpextrq $1, %xmm2, %rax
vmovd %rax, %xmm2
vpunpcklqdq %xmm1, %xmm2, %xmm1
vpextrq $0, %xmm0, %rax
vmovd %rax, %xmm2
vpextrq $1, %xmm0, %rax
vmovd %rax, %xmm0
vpunpcklqdq %xmm2, %xmm0, %xmm0
vinsertf128 $1, %xmm1, %ymm0, %ymm0
ret
Now we get:
vshufpd $1, %xmm0, %xmm0, %xmm0
vextractf128 $1, %ymm1, %xmm1
vshufpd $1, %xmm1, %xmm1, %xmm1
vinsertf128 $1, %xmm1, %ymm0, %ymm0
llvm-svn: 137733
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(lldb) target modules dump symfile
llvm-svn: 137732
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being searched for in too heavyweight a way. Now,
when asking for the address of a function, the
expression parser just asks for a corresponding
data symbol.
llvm-svn: 137731
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llvm-svn: 137728
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llvm-svn: 137725
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...
File "/Volumes/data/lldb/svn/trunk/test/lldbtest.py", line 243, in __init__
self.session = test.session if test else None
AttributeError: 'StdCXXDisassembleTestCase' object has no attribute 'session'
llvm-svn: 137724
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Patch by Kristof Beyls and James Malloy.
llvm-svn: 137723
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It is now possible to use 'command alias --python' to define a command name that actually triggers execution of a Python function
(e.g. command alias --python foo foo_impl makes a command named 'foo' that runs Python function 'foo_impl')
The Python function foo_impl should have as signature: def foo_impl(debugger, args, stream, dict): where
debugger is an object wrapping an LLDB SBDebugger
args is the command line arguments, as an unparsed Python string
stream is an SBStream that represents the standard output
dict is an internal utility parameter and should be left untouched
The function should return None on no error, or an error string to describe any problems
llvm-svn: 137722
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llvm-svn: 137721
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returned an error.
llvm-svn: 137720
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llvm-svn: 137719
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ends can use without needing to be aware of the plugin (or the plugin be aware of the front end).
Before 3.0, I'd like to add a mechanism for automatically loading a set of plugins from a config file. API suggestions welcome...
llvm-svn: 137717
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Thanks to Jonas Gafele for noticing.
llvm-svn: 137716
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llvm-svn: 137715
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expressions, and also handle inverting the order of comparison when the named decl appears on the RHS.
llvm-svn: 137714
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llvm-svn: 137712
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Mips1 does not support double precision loads or stores, therefore two single
precision loads or stores must be used in place of these instructions. This
patch treats double precision loads and stores as if they are legal
instructions until MCInstLowering, instead of generating the single precision
instructions during instruction selection or Prolog/Epilog code insertion.
Without the changes made in this patch, llc produces code that has the same
problem described in r137484 or bails out when
MipsInstrInfo::storeRegToStackSlot or loadRegFromStackSlot is called before
register allocation.
llvm-svn: 137711
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and signed integers.
llvm-svn: 137710
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...I believe it would not break anything...
FIXME: "check-all" may not be generated w/o LLVM_INCLUDE_TESTS.
llvm-svn: 137709
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llvm-svn: 137708
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llvm-svn: 137707
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llvm-svn: 137706
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binary conditions, and teach it to only focus on constraint changes.
llvm-svn: 137705
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querying of "eagerly assumed" expressions.
llvm-svn: 137704
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llvm-svn: 137703
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load/store.
llvm-svn: 137702
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processor; we may get this subtype ("CPU_SUBTYPE_X86_ARCH1") back
when starting a kdp session.
llvm-svn: 137701
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FileCheckize. It is more properly an optimizer test.
llvm-svn: 137700
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For the default case (illegal encoding type), just return false instead of break.
A8.6.84 LDRSH (register)
A8.6.309 VLD1 (single element to all lanes)
llvm-svn: 137699
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rdar://problem/8516141 has been fixed.
llvm-svn: 137698
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tagged PostStmts.
llvm-svn: 137697
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llvm-svn: 137696
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location was in a register would not be able to dereference
children when displaying "*var" or the derefence of the variable.
llvm-svn: 137695
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to be wrong (or at least somewhat suspect). Leave a FIXME for Bill.
llvm-svn: 137694
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llvm-svn: 137693
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llvm-svn: 137692
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This commit includes a mention of the landingpad instruction, but it's not
changing the behavior around it. I think the current behavior is correct,
though. Bill, can you double-check that?
llvm-svn: 137691
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