| Commit message (Collapse) | Author | Age | Files | Lines |
... | |
|
|
|
|
|
|
|
| |
The existing tests already show a sub-optimal transform,
but this should make it clear that we can't just match
an 'and' op when creating movmsk instructions.
llvm-svn: 351590
|
|
|
|
|
|
| |
To see if this helps flaky bot failures in PR40351.
llvm-svn: 351589
|
|
|
|
| |
llvm-svn: 351588
|
|
|
|
|
|
|
|
|
|
|
| |
GCC and Clang in MinGW mode don't support __declspec(thread), which
after expanding macros ends up as __attribute__((thread)). Use the
GCC specific attribute __thread instead (the next one in the chain
of alternatives).
Differential Revision: https://reviews.llvm.org/D56905
llvm-svn: 351587
|
|
|
|
|
|
|
| |
It's taken 3 years, but now all of the old AMDGPU and SI intrinsics
are finally gone
llvm-svn: 351586
|
|
|
|
| |
llvm-svn: 351585
|
|
|
|
| |
llvm-svn: 351584
|
|
|
|
|
|
|
|
| |
going directly to MachineSDNode.
This sends these intrinsics through isel in a much more normal way. This should allow addressing mode matching in isel to make better use of the displacement field.
llvm-svn: 351583
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Make sure CodeGenPrepare doesn't emit multiple inttoptr instructions of
the same integer value while sinking address computations, but rather
CSEs them on the fly: excessive inttoptr's confuse SCEV into thinking
that related pointers have nothing to do with each other.
This problem blocks LoadStoreVectorizer from vectorizing some of the
loads / stores in a downstream target.
Reviewed By: hfinkel
Differential Revision: https://reviews.llvm.org/D56838
llvm-svn: 351582
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Summary:
This patch makes some changes related to -dag-dump-verbose.
Main use case has been when debugging how SelectionDAG is
dealing with debug info (SDDbgValue nodes).
1) We now print the number of DbgValues that are mapped to each
SDNode.
2) Removed duplicated printing of DebugLoc (nowadays DebugLoc is
printed also when not using -dag-dump-verbose).
3) Renamed SDDbgValue::dump to SDDbgValue::print, and added a
new SDDbgValue::dump that will start a new line after calling
print.
4) SDDbgValue::print now prints "Order", and it also prints
some additional information when kind is CONST/FRAMEIX/VREG.
5) SelectionDAG::dump() now dumps all SDDbgValue nodes after
the list of SDNodes (both "regular" and "ByVal" SDDbgValue:s).
Invalidated nodes are not printed.
6) Prohibit inline printing of SDNode operands that has SDDbgValue
nodes associated to them.
Reviewers: jmorse, aprantl
Reviewed By: aprantl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D56793
llvm-svn: 351581
|
|
|
|
|
|
| |
Differential Revision: https://reviews.llvm.org/D56733
llvm-svn: 351580
|
|
|
|
|
|
|
|
|
|
|
| |
These two options enable/disable emission of R_{MICRO}MIPS_JALR fixups along
with PIC calls. The linker may then try to turn PIC calls into direct jumps.
By default, these fixups do get emitted by the backend, use
'-mno-relax-pic-calls' to omit them.
Differential revision: https://reviews.llvm.org/D56878
llvm-svn: 351579
|
|
|
|
|
|
|
| |
The EXPENSIVE_CHECK x86_64 Windows buildbot is failing due to this change. Fix
the map access.
llvm-svn: 351577
|
|
|
|
|
| |
Change-Id: I862f00a548236872fe24f7da8eb2bf7917e123ff
llvm-svn: 351576
|
|
|
|
|
|
|
|
| |
This reverts commit 2cedaaef383d8d6142046074ffebc2bb5a914778.
Revert with a fix.
llvm-svn: 351575
|
|
|
|
| |
llvm-svn: 351574
|
|
|
|
| |
llvm-svn: 351573
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Summary:
nullptr can implicitly convert to Twine as Twine(nullptr) in which case it
resolves to Twine(const char *). This constructor derefs the pointer and
therefore doesn't work. Add a Twine(std::nullptr_t) = delete to make it a
compile time error.
It turns out that in-tree usage of Twine(nullptr) is confined to a single
private method in IRBuilder where foldConstant(... const Twine &Name = nullptr)
and this method is only ever called with an explicit Name argument as making it
a mandatory argument doesn't cause compile-time or run-time errors.
Reviewers: jyknight
Reviewed By: jyknight
Subscribers: dexonsmith, kristina, llvm-commits
Differential Revision: https://reviews.llvm.org/D56870
llvm-svn: 351572
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Similar to D55073. Without this change, the DAG combiner crashes on code
with more than 64k of stores in a single basic block that form parallelizable
chains.
No test case, as it would be very IR file.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D56740
llvm-svn: 351571
|
|
|
|
|
|
|
|
|
|
| |
of going directly to MachineSDNode.:
This sends these intrinsics through isel in a much more normal way. This should allow addressing mode matching in isel to make better use of the displacement field.
Differential Revision: https://reviews.llvm.org/D56827
llvm-svn: 351570
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Summary:
The underlying issue is fixed in https://reviews.llvm.org/D56444
and this test ensures the issue does not creep back into our
code-base.
Reviewers: alexfh, aaron.ballman, hokein, hwright
Reviewed By: aaron.ballman
Subscribers: xazax.hun, cfe-commits
Differential Revision: https://reviews.llvm.org/D56918
llvm-svn: 351569
|
|
|
|
|
|
|
|
| |
is defined. Remove from intrin.h.
I think this was my intention when I added it xsaveintrin.h
llvm-svn: 351568
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Summary:
Scanning blocks in sub-loops for uses is unnecessary, as they were
already handled while dealing with the containing sub-loop.
This speeds up LCSSA for highly nested loops. For the test case in PR37202, it
halves the time spent in LCSSA. In cases were we won't be able to skip
any blocks, the additional lookup should be negligible.
Time-passes without this patch for test case from PR37202:
Total Execution Time: 48.5505 seconds (48.5511 wall clock)
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name ---
10.0822 ( 21.0%) 0.1406 ( 27.0%) 10.2228 ( 21.1%) 10.2228 ( 21.1%) Loop-Closed SSA Form Pass
10.0417 ( 20.9%) 0.1467 ( 28.2%) 10.1884 ( 21.0%) 10.1890 ( 21.0%) Loop-Closed SSA Form Pass #2
4.2703 ( 8.9%) 0.0040 ( 0.8%) 4.2742 ( 8.8%) 4.2742 ( 8.8%) Unswitch loops
2.7376 ( 5.7%) 0.0229 ( 4.4%) 2.7605 ( 5.7%) 2.7611 ( 5.7%) Loop-Closed SSA Form Pass #5
2.7332 ( 5.7%) 0.0214 ( 4.1%) 2.7546 ( 5.7%) 2.7546 ( 5.7%) Loop-Closed SSA Form Pass #3
2.7088 ( 5.6%) 0.0230 ( 4.4%) 2.7319 ( 5.6%) 2.7324 ( 5.6%) Loop-Closed SSA Form Pass #4
2.6855 ( 5.6%) 0.0236 ( 4.5%) 2.7091 ( 5.6%) 2.7090 ( 5.6%) Loop-Closed SSA Form Pass #6
2.1648 ( 4.5%) 0.0018 ( 0.4%) 2.1666 ( 4.5%) 2.1664 ( 4.5%) Unroll loops
1.8371 ( 3.8%) 0.0009 ( 0.2%) 1.8379 ( 3.8%) 1.8380 ( 3.8%) Value Propagation
1.8149 ( 3.8%) 0.0021 ( 0.4%) 1.8170 ( 3.7%) 1.8169 ( 3.7%) Loop Invariant Code Motion
1.6755 ( 3.5%) 0.0226 ( 4.3%) 1.6981 ( 3.5%) 1.6980 ( 3.5%) Loop-Closed SSA Form Pass #7
Time-passes with this patch
Total Execution Time: 29.9285 seconds (29.9276 wall clock)
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name ---
5.2786 ( 17.7%) 0.0021 ( 1.2%) 5.2806 ( 17.6%) 5.2808 ( 17.6%) Unswitch loops
4.3739 ( 14.7%) 0.0303 ( 18.1%) 4.4042 ( 14.7%) 4.4042 ( 14.7%) Loop-Closed SSA Form Pass
4.2658 ( 14.3%) 0.0192 ( 11.5%) 4.2850 ( 14.3%) 4.2851 ( 14.3%) Loop-Closed SSA Form Pass #2
2.2307 ( 7.5%) 0.0013 ( 0.8%) 2.2320 ( 7.5%) 2.2318 ( 7.5%) Loop Invariant Code Motion
2.0888 ( 7.0%) 0.0012 ( 0.7%) 2.0900 ( 7.0%) 2.0897 ( 7.0%) Unroll loops
1.6761 ( 5.6%) 0.0013 ( 0.8%) 1.6774 ( 5.6%) 1.6774 ( 5.6%) Value Propagation
1.3686 ( 4.6%) 0.0029 ( 1.8%) 1.3716 ( 4.6%) 1.3714 ( 4.6%) Induction Variable Simplification
1.1457 ( 3.8%) 0.0010 ( 0.6%) 1.1468 ( 3.8%) 1.1468 ( 3.8%) Loop-Closed SSA Form Pass #4
1.1384 ( 3.8%) 0.0005 ( 0.3%) 1.1389 ( 3.8%) 1.1389 ( 3.8%) Loop-Closed SSA Form Pass #6
1.1360 ( 3.8%) 0.0027 ( 1.6%) 1.1387 ( 3.8%) 1.1387 ( 3.8%) Loop-Closed SSA Form Pass #5
1.1331 ( 3.8%) 0.0010 ( 0.6%) 1.1341 ( 3.8%) 1.1340 ( 3.8%) Loop-Closed SSA Form Pass #3
Reviewers: davide, efriedma, mzolotukhin
Reviewed By: davide, efriedma
Subscribers: hiraditya, dmgreen, llvm-commits
Differential Revision: https://reviews.llvm.org/D56848
llvm-svn: 351567
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Summary:
Among other things, this allows using STL algorithms like 'find_if' over
llvm::Registry.
Reviewers: sammccall
Reviewed By: sammccall
Subscribers: kristina, llvm-commits
Differential Revision: https://reviews.llvm.org/D56854
llvm-svn: 351566
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Summary:
This attribute will allow users to opt specific functions out of
speculative load hardening. This compliments the Clang attribute
named speculative_load_hardening. When this attribute or the attribute
speculative_load_hardening is used in combination with the flags
-mno-speculative-load-hardening or -mspeculative-load-hardening,
the function level attribute will override the default during LLVM IR
generation. For example, in the case, where the flag opposes the
function attribute, the function attribute will take precendence.
The sticky inlining behavior of the speculative_load_hardening attribute
may cause a function with the no_speculative_load_hardening attribute
to be tagged with the speculative_load_hardening tag in
subsequent compiler phases which is desired behavior since the
speculative_load_hardening LLVM attribute is designed to be maximally
conservative.
If both attributes are specified for a function, then an error will be
thrown.
Reviewers: chandlerc, echristo, kristof.beyls, aaron.ballman
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D54909
llvm-svn: 351565
|
|
|
|
|
|
|
|
| |
backtrace using EH frame, it works.
Prior to this, backtraces could fail due to not being able to convert a EH frame register number to LLDB register number.
llvm-svn: 351564
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Summary:
It is producing too much input in non-verbose mode,
i.e. a message per indexed file
Reviewers: sammccall, kadircet
Reviewed By: sammccall
Subscribers: ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Differential Revision: https://reviews.llvm.org/D56915
llvm-svn: 351563
|
|
|
|
|
|
|
|
|
| |
This commit adds some missing intrinsics into the isAlwaysUniform list
for the AMDGPU backend.
Differential Revision: https://reviews.llvm.org/D56845
llvm-svn: 351562
|
|
|
|
| |
llvm-svn: 351561
|
|
|
|
|
|
|
|
|
|
|
|
| |
Set the test to properly require aarch64 instead of arm. Otherwise, this test fails with LLVM_TARGETS_TO_BUILD='ARM;X86'
bin/llvm-mc: : error: unable to get target for 'arm64-apple-ios7.0.0'
Committed on behalf of @easyaspi314 (Devin)
Differential Revision: https://reviews.llvm.org/D56472
llvm-svn: 351560
|
|
|
|
| |
llvm-svn: 351559
|
|
|
|
|
|
|
|
| |
Defer inline asm's output fixup work until after we've generated the
inline asm node itself. Remove StoresToEmit, IndirectStoresToEmit, and
RetValRegs in favor of using ConstraintOperands.
llvm-svn: 351558
|
|
|
|
| |
llvm-svn: 351557
|
|
|
|
|
|
| |
msan errors in ELF/strip-all.s.
llvm-svn: 351556
|
|
|
|
|
|
|
|
|
|
| |
See bug 39332: https://bugs.llvm.org/show_bug.cgi?id=39332
Reviewers: artem.tamazov, arsenm
Differential Revision: https://reviews.llvm.org/D56794
llvm-svn: 351555
|
|
|
|
|
|
| |
Same as we do in the Value variant.
llvm-svn: 351554
|
|
|
|
|
|
|
|
| |
`SectionSymbol*` is cast from `void*` to
`std::tuple<uint64_t, StringRef, uint8_t>` in AMDGPUSymbolizer, so it has to
*be* one, not *act like* one.
llvm-svn: 351553
|
|
|
|
|
|
|
|
|
| |
This functionality is required at multiple places which potentially
create large operand lists, like SelectionDAGBuilder or DAGCombiner.
Differential Revision: https://reviews.llvm.org/D56739
llvm-svn: 351552
|
|
|
|
|
|
|
|
|
|
|
|
| |
This is a follow-up to r351448. It adds support for other _*Z extensions
of the Itanium demanling, to the newly available demangle function
heuristic.
Reviewed by: erik.pilkington, rupprecht, grimar
Differential Revision: https://reviews.llvm.org/D56855
llvm-svn: 351551
|
|
|
|
|
|
|
|
|
|
|
| |
The test has problems due to some platforms having a different type for
ptrdiff_t, so the error message is different. The error message doesn't
matter to the test for anything other than an incompatible intger to
pointer conversion, so this patch removes the integral type from the
expected message.
Change-Id: I80e786f9b80268163813774bbf25a9ca25b6c60c
llvm-svn: 351550
|
|
|
|
|
|
|
|
|
|
| |
See bug 39319: https://bugs.llvm.org/show_bug.cgi?id=39319
Reviewers: artem.tamazov, arsenm, rampitec
Differential Revision: https://reviews.llvm.org/D56847
llvm-svn: 351549
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Summary:
The operators simply print the underlying value or "None".
The trickier part of this patch is making sure the streaming operators
work even in unit tests (which was my primary motivation, though I can
also see them being useful elsewhere). Since the stream operator was a
template, implicit conversions did not kick in, and our gtest glue code
was explicitly introducing an implicit conversion to make sure other
implicit conversions do not kick in :P. I resolve that by specializing
llvm_gtest::StreamSwitch for llvm:Optional<T>.
Reviewers: sammccall, dblaikie
Reviewed By: sammccall
Subscribers: mgorny, dexonsmith, kristina, llvm-commits
Differential Revision: https://reviews.llvm.org/D56795
llvm-svn: 351548
|
|
|
|
|
|
|
|
|
|
|
| |
When -all-headers is given it is supposed to dump all headers,
but now it skips the archive headers for no reason.
The patch fixes that.
Differential revision: https://reviews.llvm.org/D56780
llvm-svn: 351547
|
|
|
|
|
|
|
|
|
| |
Extend ranking to work with address spaces correctly when
resolving overloads.
Differential Revision: https://reviews.llvm.org/D56735
llvm-svn: 351546
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
llvm-objdump.cpp
getRelocationValueString is a dispatcher function that calls the
corresponding ELF/COFF/Wasm/MachO implementations
that currently live in the llvm-objdump.cpp file.
These implementations better be moved to ELFDump.cpp,
COFFDump.cpp and other corresponding files, to move platform specific
implementation out from the common logic.
The patch does that. Also, I had to move ToolSectionFilter helper
and SectionFilterIterator, SectionFilter to a header to make them
available across the objdump code.
Differential revision: https://reviews.llvm.org/D56842
llvm-svn: 351545
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Prior to this patch, the AVR::LDWRdPtr instruction was always lowered to
instructions of this pattern:
ld $GPR8, [PTR:XYZ]+
ld $GPR8, [PTR]+1
This has a problem; the [PTR] is incremented in-place once, but never
decremented.
Future uses of the same pointer will use the now clobbered value,
leading to the pointer being incorrect by an offset of one.
This patch modifies the expansion code of the LDWRdPtr pseudo
instruction so that the pointer variable is not silently clobbered in
future uses in the same live range.
Patch by Keshav Kini.
llvm-svn: 351544
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Currently llvm-objdump is inconsistent.
When -help is specified it shows no aliases except two.
Aliases are shown with -help-hidden though.
GNU objdump also prints them by default.
This patch does a change to always show all aliases
when -help is given.
Differential revision: https://reviews.llvm.org/D56853
llvm-svn: 351542
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Summary:
This centralizes parsing of breakpad records, which was previously
spread out over ObjectFileBreakpad and SymbolFileBreakpad.
For each record type X there is a separate breakpad::XRecord class, and
an associated parse function. The classes just store the information in
the breakpad records in a more accessible form. It is up to the users to
determine what to do with that data.
This separation also made it possible to write some targeted tests for
the parsing code, which was previously unaccessible, so I write a couple
of those too.
Reviewers: clayborg, lemo, zturner
Reviewed By: clayborg
Subscribers: mgorny, fedor.sergeev, lldb-commits
Differential Revision: https://reviews.llvm.org/D56844
llvm-svn: 351541
|
|
|
|
|
|
|
| |
Extra dependencies need to be listed for StaticAnalysisTests in order for
linking to succeed when BUILD_SHARED_LIBS=True.
llvm-svn: 351540
|
|
|
|
|
|
|
|
|
| |
Now that the CBR alias has lower priority than ANDI, the assembly
printer uses ANDI instead.
Original broken in r351526.
llvm-svn: 351539
|