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* Revert "InstrProf: Add unit tests for the profile reader and writer"Justin Bogner2015-02-176-154/+15
| | | | | | | | | | This added API to the InstrProfWriter to write to a string so I could write unittests without using temp files. This doesn't really work, since the format has tighter alignment requirements than a char. This reverts r229478 and its follow-up, r229481. llvm-svn: 229483
* AVX-512: changes in intel_ocl_bi calling conventionsElena Demikhovsky2015-02-173-14/+138
| | | | | | | | - added mask types v8i1 and v16i1 to possible function parameters - enabled passing 512-bit vectors in standard CC - added a test for KNL intel_ocl_bi conventions llvm-svn: 229482
* InstrProf: Add missing header from r229478Justin Bogner2015-02-171-0/+2
| | | | llvm-svn: 229481
* [X86] Combine vector anyext + and into a vector zextMichael Kuperstein2015-02-172-85/+163
| | | | | | | | | | Vector zext tends to get legalized into a vector anyext, represented as a vector shuffle with an undef vector + a bitcast, that gets ANDed with a mask that zeroes the undef elements. Combine this into an explicit shuffle with a zero vector instead. This allows shuffle lowering to match it as a zext, instead of matching it as an anyext and emitting an explicit AND. This combine only covers a subset of the cases, but it's a start. Differential Revision: http://reviews.llvm.org/D7666 llvm-svn: 229480
* Add missing files to autoconf buildTobias Grosser2015-02-171-0/+5
| | | | llvm-svn: 229479
* Re-apply "InstrProf: Add unit tests for the profile reader and writer"Justin Bogner2015-02-176-15/+152
| | | | | | | | Add these tests again, but use va_list instead of initializer lists. This reverts r229456, reapplying r229455. llvm-svn: 229478
* [PBQP] NDEBUG guards added around code needed for assert.Jonas Paulsson2015-02-172-1/+16
| | | | | | | wasConservativelyAllocatable() is only called to assert that a conservatively allocatable node wasn't forced to spill. llvm-svn: 229477
* Update isl to 0ae2b02 "isl_seq_combine: optimize for common case"Tobias Grosser2015-02-171-0/+8
| | | | | | | | This is just a single commit that includes a performance optimization that should improve dependence analysis time. Our performance bots should measure this difference. llvm-svn: 229476
* Make the PowerPC AsmPrinter independent of global subtargetEric Christopher2015-02-171-15/+24
| | | | | | | | | initialization. Initialize the subtarget once per function and migrate EmitStartOfAsmFile to either use attributes on the TargetMachine or get information from all of the various subtargets. llvm-svn: 229475
* [X86] Convert palignr builtin handling to use shuffle form of right shift ↵Craig Topper2015-02-173-37/+18
| | | | | | instead of intrinsics. This should allow the instrinsics to removed from the backend. llvm-svn: 229474
* InstrProf: Use a test fixture in the coverage mapping testsJustin Bogner2015-02-171-69/+77
| | | | llvm-svn: 229473
* Add a FIXME to move IsLittleEndian to the target machine.Eric Christopher2015-02-171-0/+1
| | | | llvm-svn: 229472
* Move ABI handling and 64-bitness to the PowerPC target machine.Eric Christopher2015-02-176-36/+46
| | | | | | | This required changing how the computation of the ABI is handled and how some of the checks for ABI/target are done. llvm-svn: 229471
* Add more tests for NSArray/NSDictionary literalsAlex Denisov2015-02-172-0/+26
| | | | llvm-svn: 229470
* [X86] Merge the 2 separate builtin handlers for PALIGNR into a single one ↵Craig Topper2015-02-172-52/+49
| | | | | | that handles both. llvm-svn: 229469
* [X86] Remove code that does custom handling of the builtin for MMX palignr. ↵Craig Topper2015-02-171-31/+0
| | | | | | This code is unreachable since its already marked for non-custom handling in llvm's IntrinsicsX86.td file. llvm-svn: 229468
* [Orc][Kaleidoscope] Fix misnumbered steps in comments, plus tidy oneLang Hames2015-02-171-4/+4
| | | | | | explanation up a little. llvm-svn: 229467
* [Orc][Kaleidoscope] Add an example of extreme-laziness in Orc.Lang Hames2015-02-174-0/+1454
| | | | | | | | The version of the tutorial uses the new compile callbacks API to inject stubs that trigger IRGen & Codegen of their respective function bodies when they are first called. llvm-svn: 229466
* [Orc][Kaleidoscope] Update the MainLoop code of the orc/kaleidoscope tutorialsLang Hames2015-02-173-12/+12
| | | | | | to get rid of the duplicate prompt. NFC. llvm-svn: 229465
* AsmPrinter: Use DIExpression default constructor, NFCDuncan P. N. Exon Smith2015-02-171-1/+1
| | | | llvm-svn: 229464
* [x86] Teach the unpack lowering to try wider element unpacks.Chandler Carruth2015-02-175-65/+115
| | | | | | | | | | | This allows it to match still more places where previously we would have to fall back on floating point shuffles or other more complex lowering strategies. I'm hoping to replace some of the hand-rolled unpack matching with this routine is it gets more and more clever. llvm-svn: 229463
* [BDCE] Add a bit-tracking DCE passHal Finkel2015-02-1710-0/+812
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BDCE is a bit-tracking dead code elimination pass. It is based on ADCE (the "aggressive DCE" pass), with the added capability to track dead bits of integer valued instructions and remove those instructions when all of the bits are dead. Currently, it does not actually do this all-bits-dead removal, but rather replaces the instruction's uses with a constant zero, and lets instcombine (and the later run of ADCE) do the rest. Because we essentially get a run of ADCE "for free" while tracking the dead bits, we also do what ADCE does and removes actually-dead instructions as well (this includes instructions newly trivially dead because all bits were dead, but not all such instructions can be removed). The motivation for this is a case like: int __attribute__((const)) foo(int i); int bar(int x) { x |= (4 & foo(5)); x |= (8 & foo(3)); x |= (16 & foo(2)); x |= (32 & foo(1)); x |= (64 & foo(0)); x |= (128& foo(4)); return x >> 4; } As it turns out, if you order the bit-field insertions so that all of the dead ones come last, then instcombine will remove them. However, if you pick some other order (such as the one above), the fact that some of the calls to foo() are useless is not locally obvious, and we don't remove them (without this pass). I did a quick compile-time overhead check using sqlite from the test suite (Release+Asserts). BDCE took ~0.4% of the compilation time (making it about twice as expensive as ADCE). I've not looked at why yet, but we eliminate instructions due to having all-dead bits in: External/SPEC/CFP2006/447.dealII/447.dealII External/SPEC/CINT2006/400.perlbench/400.perlbench External/SPEC/CINT2006/403.gcc/403.gcc MultiSource/Applications/ClamAV/clamscan MultiSource/Benchmarks/7zip/7zip-benchmark llvm-svn: 229462
* [Orc] Update the Orc indirection utils and refactor the CompileOnDemand layer.Lang Hames2015-02-177-519/+552
| | | | | | | | | | | | | | This patch replaces most of the Orc indirection utils API with a new class: JITCompileCallbackManager, which creates and manages JIT callbacks. Exposing this functionality directly allows the user to create callbacks that are associated with user supplied compilation actions. For example, you can create a callback to lazyily IR-gen something from an AST. (A kaleidoscope example demonstrating this will be committed shortly). This patch also refactors the CompileOnDemand layer to use the JITCompileCallbackManager API. llvm-svn: 229461
* Specify arch in test/CodeGen/X86/float-conv-elim.llHal Finkel2015-02-171-1/+1
| | | | | | | | This test was failing on non-x86 hosts because it specified a cpu of x86_64, but not an architecture. x86_64 is obviously not a valid cpu on all architectures. llvm-svn: 229460
* AsmPrinter: Stop creating DebugLocsDuncan P. N. Exon Smith2015-02-173-16/+8
| | | | | | | | | | | | | | | | While looking at a heap profile of a clang LTO bootstrap with -g, I noticed that 2.2% of memory in an `llvm-lto` of clang is from calling `DebugLoc::get()` in `collectVariableInfo()` (accounting for ~40% of memory used for `MDLocation`s). I suspect this was introduced by r226736, whose goal was to prevent uniquing of `DebugLoc`s (goal achieved, if so). There's no reason we need a `DebugLoc` here at all -- it was just being used for (in)convenient API -- so the fix is to pass the scope and inlined-at directly to `LexicalScopes::findInlinedScope()`. llvm-svn: 229459
* [Objctive-C sema]. Do not do the unused-getter-return-valueFariborz Jahanian2015-02-163-10/+28
| | | | | | | warning when property getter is used in direct method call and return value of property is unused. rdar://19773512 llvm-svn: 229458
* [PowerPC] Support non-direct-sub/superclass VSX copiesHal Finkel2015-02-163-4/+252
| | | | | | | | | | | | | | | | Our register allocation has become better recently, it seems, and is now starting to generate cross-block copies into inflated register classes. These copies are not transformed into subregister insertions/extractions by the PPCVSXCopy class, and so need to be handled directly by PPCInstrInfo::copyPhysReg. The code to do this was *almost* there, but not quite (it was unnecessarily restricting itself to only the direct sub/super-register-class case (not copying between, for example, something in VRRC and the lower-half of VSRC which are super-registers of F8RC). Triggering this behavior manually is difficult; I'm including two bugpoint-reduced test cases from the test suite. llvm-svn: 229457
* Revert "InstrProf: Add unit tests for the profile reader and writer"Justin Bogner2015-02-166-145/+15
| | | | | | | | Looks like the bots don't like my initializer lists. This reverts r229455 llvm-svn: 229456
* InstrProf: Add unit tests for the profile reader and writerJustin Bogner2015-02-166-15/+145
| | | | | | | | | | This required some minor API to be added to these types to avoid needing temp files. Also, I've used initializer lists in the tests, as MSVC 2013 claims to support them. I'll redo this without them if the bots complain. llvm-svn: 229455
* Minor tweaks to r229447 to ensure the attribute is properly quoted when ↵Aaron Ballman2015-02-165-11/+10
| | | | | | diagnosed. llvm-svn: 229454
* [Mips] Replace a magic number by enumerationSimon Atanasyan2015-02-161-1/+1
| | | | | | No functional changes. llvm-svn: 229453
* [Mips] Add .MIPS.options section descriptor kinds enumerationSimon Atanasyan2015-02-162-1/+17
| | | | | | No functional changes. llvm-svn: 229452
* [Orc] Add an emitAndFinalize method to the ObjectLinkingLayer, IRCompileLayerLang Hames2015-02-163-9/+45
| | | | | | | | | | | | | and LazyEmittingLayer of Orc. This method allows you to immediately emit and finalize a module. It is required by an upcoming refactor of the indirection utils and the compile-on-demand layer. I've filed http://llvm.org/PR22608 to write unit tests for this and other Orc APIs. llvm-svn: 229451
* Wrap to 80 columns. No behavior change.Nico Weber2015-02-161-4/+5
| | | | llvm-svn: 229450
* For variables with dependent type, don't crash on `var->::new` or `var->__super`Nico Weber2015-02-163-6/+25
| | | | | | | | | | | | | | | | | | | | | ParsePostfixExpressionSuffix() for '->' (or '.') postfixes first calls ActOnStartCXXMemberReference() to inform sema that a member reference is about to start, and that function lets the parser know if sema thinks that the base expression's type could allow a pseudo destructor from a semantic point of view (for example, if the the base expression has a dependent type). ParsePostfixExpressionSuffix() then calls ParseOptionalCXXScopeSpecifier() and passes MayBePseudoDestructor on to that function, expecting the function to set it to false if a pseudo destructor is impossible from a syntactic point of view (due to a lack of '~' sigil). However, ParseOptionalCXXScopeSpecifier() had early-outs for ::new and __super, so MayBePseudoDestructor stayed true, so we tried to parse a pseudo dtor, and then became confused since we couldn't find a '~'. Move the snippet in ParseOptionalCXXScopeSpecifier() that sets MayBePseudoDestructor to false above the early exits. Parts of this found by SLi's bot. llvm-svn: 229449
* [ARM] Remove unused declaration. NFC.Ahmed Bougacha2015-02-161-1/+0
| | | | | | | GlobalMerge was moved to lib/CodeGen a while ago, and is no longer called "ARMGlobalMerge". llvm-svn: 229448
* Sema: diagnose use of unscoped deprecated prior to C++14Saleem Abdulrasool2015-02-165-2/+32
| | | | | | | | | The deprecated attribute was adopted as part of the C++14, however, there is a GNU version available in C++11. When using C++ earlier than C++14, diagnose the use of the attribute without the GNU scope, but only when using the generalised attribute syntax. llvm-svn: 229447
* Parse: return true from ParseCXX11AttributeArgs if an attribute was addedSaleem Abdulrasool2015-02-161-2/+0
| | | | | | | | | | | | | | | | | | In the case that we diagnosed an invalid attribute due to missing or present arguments, we would return false, indicating to the caller that the parsing failed. However, we would have added the attribute in ParseAttributeArgsCommon (which may have been called indirectly through ParseGNUAttributeArgs). Returning true in this case ensures that a second copy of the attribute is not added. I haven't added a test case for this as the existing test will cover this with the next commit which diagnoses a C++14 attribute applied in C++11 mode. Rather than duplicating the existing test case, allow the tree to remain without a test between this and the next change. We would see double warnings in the [[deprecated()]] applied to a declaration in C++11 mode, which will cause an error in the cxx0x-attributes test. llvm-svn: 229446
* [AVX512] Make 512b vector floating point rounds legal on AVX512.Cameron McInally2015-02-162-0/+92
| | | | llvm-svn: 229445
* RegisterCoalescer: Don't rematerialize subregister definitions.Matthias Braun2015-02-161-0/+18
| | | | | | | | | | | We cannot simply rematerialize instructions which only defining a subregister, as the final value also depends on the previous instructions. This fixes test/CodeGen/R600/subreg-coalescer-bug.ll with subreg liveness enabled. llvm-svn: 229444
* RegisterCoalescer: Do not look for regclass of IMPLICIT_DEF.Matthias Braun2015-02-161-6/+7
| | | | | | | | | | | | IMPLICIT_DEF is a generic instruction and has no (fixed) output register class defined. The rematerialization code of the register coalescer should not scan the instruction description for a register class. This fixes a problem showing up in test/CodeGen/R600/subreg-coalescer-crash.ll with subregister liveness enabled. llvm-svn: 229443
* [Mips] Read GP0 value from .MIPS.options sectionSimon Atanasyan2015-02-162-5/+115
| | | | llvm-svn: 229442
* [Mips] Show error if MIPS_REGINFO section has invalid sizeSimon Atanasyan2015-02-162-3/+31
| | | | llvm-svn: 229441
* [Mips] Factor out the code to search section by type and flags into theSimon Atanasyan2015-02-161-18/+31
| | | | | | | | separate functions No functional changes. llvm-svn: 229440
* [X86][SSE] Add SSE MOVQ instructions to SSEPackedInt domainSimon Pilgrim2015-02-165-15/+15
| | | | | | | | Patch to explicitly add the SSE MOVQ (rr,mr,rm) instructions to SSEPackedInt domain - prevents a number of costly domain switches. Differential Revision: http://reviews.llvm.org/D7600 llvm-svn: 229439
* SelectionDAG: fold (fp_to_u/sint (s/uint_to_fp)) here tooMehdi Amini2015-02-164-18/+98
| | | | | | | Update SPARC tests to match. From: Fiona Glaser <fglaser@apple.com> llvm-svn: 229438
* InstCombine: fold more cases of (fp_to_u/sint (u/sint_to_fp val))Mehdi Amini2015-02-163-22/+159
| | | | | | | Fixes radar 15486701. From: Fiona Glaser <fglaser@apple.com> llvm-svn: 229437
* Tests: reformat sitofp.ll and use FileCheckMehdi Amini2015-02-161-20/+39
| | | | | From: Fiona Glaser <fglaser@apple.com> llvm-svn: 229436
* [X86] Remove completely unnecessary switch statement.Craig Topper2015-02-161-12/+2
| | | | llvm-svn: 229435
* InstrProf: Update for LLVM API changeJustin Bogner2015-02-161-2/+4
| | | | | | Update for the API change in r229433 llvm-svn: 229434
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