summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
...
* [asan] Re-enable no_asan_gen_globals for 32-bitVitaly Buka2018-06-081-2/+0
| | | | | | PR22682. Bug in gold was fixed 3 years ago. llvm-svn: 334319
* [SCEV] Look through zero-extends in howFarToZeroKrzysztof Parzyszek2018-06-083-1/+59
| | | | | | | | | | | | An expression like (zext i2 {(trunc i32 (1 + %B) to i2),+,1}<%while.body> to i32) will become zero exactly when the nested value becomes zero in its type. Strip injective operations from the input value in howFarToZero to make the value simpler. Differential Revision: https://reviews.llvm.org/D47951 llvm-svn: 334318
* [InstCombine] Skip dbg.value(s) when looking at stack{save,restore}.Davide Italiano2018-06-082-1/+55
| | | | | | Fixes PR37713. llvm-svn: 334317
* [Sanitizers] Check alignment != 0 for aligned_alloc and posix_memalignAlex Shlyapnikov2018-06-0817-99/+141
| | | | | | | | | | | | | | | Summary: Move the corresponding tests to the common folder (as all of the sanitizer allocators will support this feature soon) and add the checks specific to aligned_alloc to ASan and LSan allocators. Reviewers: vitalybuka Subscribers: srhines, kubamracek, delcypher, #sanitizers, llvm-commits Differential Revision: https://reviews.llvm.org/D47924 llvm-svn: 334316
* [clangd] Fix fuzzer after r333993Sam McCall2018-06-081-3/+3
| | | | llvm-svn: 334315
* [InstCombine] add llvm.assume + debuginfo test (PR37726); NFCSanjay Patel2018-06-081-1/+45
| | | | llvm-svn: 334314
* [asan] Instrument comdat globals on COFF targetsReid Kleckner2018-06-082-8/+79
| | | | | | | | | | | | | | | | | | | Summary: If we can use comdats, then we can make it so that the global metadata is thrown away if the prevailing definition of the global was uninstrumented. I have only tested this on COFF targets, but in theory, there is no reason that we cannot also do this for ELF. This will allow us to re-enable string merging with ASan on Windows, reducing the binary size cost of ASan on Windows. Reviewers: eugenis, vitalybuka Subscribers: hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D47841 llvm-svn: 334313
* [DAGCombiner] clean up comments; NFCSanjay Patel2018-06-081-8/+5
| | | | llvm-svn: 334312
* [X86] Add builtins for vpermq/vpermpd instructions to enable target feature ↵Craig Topper2018-06-089-54/+46
| | | | | | checking. llvm-svn: 334311
* [X86] Change immediate type for some builtins from char to int.Craig Topper2018-06-084-16/+20
| | | | | | These builtins are all handled by CGBuiltin.cpp so it doesn't much matter what the immediate type is, but int matches the intrinsic spec. llvm-svn: 334310
* [X86][SSE] Support v8i16/v16i16 rotationsSimon Pilgrim2018-06-084-617/+374
| | | | | | | | Extension to D46954 (PR37426), this patch adds support for v8i16/v16i16 rotations in a similar manner - the conversion of the shift/rotate amount to a multiplication factor and the use of PMULLW to shift left and PMULHUW (ISD::MULHU) to shift the wrapped bits back around to be ORd together. Differential Revision: https://reviews.llvm.org/D47822 llvm-svn: 334309
* [x86] add tests for node-level FMF; NFCSanjay Patel2018-06-081-0/+26
| | | | | | These cases should be optimized using the change from D47911. llvm-svn: 334308
* [x86] regenerate test checks; NFCSanjay Patel2018-06-081-70/+77
| | | | llvm-svn: 334307
* Utilize new SDNode flag functionality to expand current support for fsubMichael Berg2018-06-082-32/+51
| | | | | | | | | | | | | | Summary: This patch originated from D46562 and is a proper subset, with some issues addressed for fsub. Reviewers: spatel, hfinkel, wristow, arsenm Reviewed By: spatel Subscribers: wdng Differential Revision: https://reviews.llvm.org/D47910 llvm-svn: 334306
* [VPlan] Move recipe construction to VPRecipeBuilder.Florian Hahn2018-06-084-153/+218
| | | | | | | | | | | | | | This patch moves the recipe-creation functions out of LoopVectorizationPlanner, which should do the high-level orchestration of the transformations. Reviewers: dcaballe, rengolin, hsaito, Ayal Reviewed By: dcaballe Differential Revision: https://reviews.llvm.org/D47595 llvm-svn: 334305
* [PPC64] Add support for local-exec TLS modelZaara Syeda2018-06-084-2/+209
| | | | | | | | | | | | | | | | | | | This patch adds the relocations needed support the local-exec TLS model: R_PPC64_TPREL16 R_PPC64_TPREL16_HA R_PPC64_TPREL16_LO R_PPC64_TPREL16_HI R_PPC64_TPREL16_DS R_PPC64_TPREL16_LO_DS R_PPC64_TPREL16_HIGHER R_PPC64_TPREL16_HIGHERA R_PPC64_TPREL16_HIGHEST R_PPC64_TPREL16_HIGHESTA Differential Revision: https://reviews.llvm.org/D47598 llvm-svn: 334304
* [X86][BtVer2] Add support for all SUB/XOR 32/64 scalar instructions that ↵Simon Pilgrim2018-06-083-132/+139
| | | | | | | | should match the dependency-breaking 'zero-idiom' As detailed on Agner's Microarchitecture doc (21.8 AMD Bobcat and Jaguar pipeline - Dependency-breaking instructions), these instructions are dependency breaking and fast-path zero the destination register (and appropriate EFLAGS bits). llvm-svn: 334303
* [X86] Fix schedule-x86_64.s tests to use different registers in reg-reg casesSimon Pilgrim2018-06-081-372/+372
| | | | | | Same fix as rL334110: I noticed while working on zero-idiom + dependency-breaking support (PR36671) that most of our binary instruction schedule tests were reusing the same src registers, which would cause the tests to fail once we enable scalar zero-idiom support on btver2. llvm-svn: 334302
* [AMDGPU] Inline asm - added i16, half and i128 types supportDaniil Fukalov2018-06-084-70/+65
| | | | | | | | | | AMDGPU inline assembler support i16, half and i128 typed variables in constraints, but they were reported as error. Needed to fix https://github.com/RadeonOpenCompute/ROCm/issues/341, e.g. to be able to load with global_load_dwordx4 to a 128bit integer variable Differential Revision: https://reviews.llvm.org/D44920 llvm-svn: 334301
* reapply r334209 with fixes for harfbuzz in ChromiumDaniil Fukalov2018-06-082-17/+68
| | | | | | | | | | | r334209 description: [LSR] Check yet more intrinsic pointer operands the patch fixes another assertion in isLegalUse() Differential Revision: https://reviews.llvm.org/D47794 llvm-svn: 334300
* [NFC][InstSimplify] SimplifyAddInst(): coding style: variable names.Roman Lebedev2018-06-081-5/+5
| | | | llvm-svn: 334299
* [InstSimplify] add nuw %x, -1 -> -1 fold.Roman Lebedev2018-06-083-18/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: `%ret = add nuw i8 %x, C` From [[ https://llvm.org/docs/LangRef.html#add-instruction | langref ]]: nuw and nsw stand for “No Unsigned Wrap” and “No Signed Wrap”, respectively. If the nuw and/or nsw keywords are present, the result value of the add is a poison value if unsigned and/or signed overflow, respectively, occurs. So if `C` is `-1`, `%x` can only be `0`, and the result is always `-1`. I'm not sure we want to use `KnownBits`/`LVI` here, because there is exactly one possible value (all bits set, `-1`), so some other pass should take care of replacing the known-all-ones with constant `-1`. The `test/Transforms/InstCombine/set-lowbits-mask-canonicalize.ll` change *is* confusing. What happening is, before this: (omitting `nuw` for simplicity) 1. First, InstCombine D47428/rL334127 folds `shl i32 1, %NBits`) to `shl nuw i32 -1, %NBits` 2. Then, InstSimplify D47883/rL334222 folds `shl nuw i32 -1, %NBits` to `-1`, 3. `-1` is inverted to `0`. But now: 1. *This* InstSimplify fold `%ret = add nuw i32 %setbit, -1` -> `-1` happens first, before InstCombine D47428/rL334127 fold could happen. Thus we now end up with the opposite constant, and it is all good: https://rise4fun.com/Alive/OA9 https://rise4fun.com/Alive/sldC Was mentioned in D47428 review. Follow-up for D47883. Reviewers: spatel, craig.topper Reviewed By: spatel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D47908 llvm-svn: 334298
* [X86][BtVer2] Remove SBB tests that were accidentally added in rL334296Simon Pilgrim2018-06-081-130/+120
| | | | | | These aren't true zero-idiom instructions (just dependency breaking). llvm-svn: 334297
* [X86][BtVer2] Add tests for scalar SUB/XOR instructions that should match ↵Simon Pilgrim2018-06-081-119/+143
| | | | | | | | the dependency-breaking 'zero-idiom' As detailed on Agner's Microarchitecture doc (21.8 AMD Bobcat and Jaguar pipeline - Dependency-breaking instructions). llvm-svn: 334296
* commandLineFitsWithinSystemLimits Overestimates System LimitsAlexander Kornienko2018-06-081-1/+12
| | | | | | | | | | | | | | | | | | | | | | | Summary: The function `llvm::sys::commandLineFitsWithinSystemLimits` appears to be overestimating the system limits. This issue was discovered while attempting to enable response files in the Swift compiler. When the compiler submits its frontend jobs, those jobs are subjected to the system limits on command line length. `commandLineFitsWithinSystemLimits` is used to determine if the job's arguments need to be wrapped in a response file. There are some cases where the argument size for the job passes `commandLineFitsWithinSystemLimits`, but actually exceeds the real system limit, and the job fails. `clang` also uses this function to decide whether or not to wrap it's job arguments in response files. See: https://github.com/llvm-mirror/clang/blob/master/lib/Driver/Driver.cpp#L1341. Clang will also fail for response files who's size falls within a certain range. I wrote a script that should find a failure point for `clang++`. All that is needed to run it is Python 2.7, and a simple "hello world" program for `test.cc`. It should run on Linux and on macOS. The script is available here: https://gist.github.com/dabelknap/71bd083cd06b91c5b3cef6a7f4d3d427. When it hits a failure point, you should see a `clang: error: unable to execute command: posix_spawn failed: Argument list too long`. The proposed solution is to mirror the behavior of `xargs` in `commandLinefitsWithinSystemLimits`. `xargs` defaults to 128k for the command line length size (See: https://fossies.org/dox/findutils-4.6.0/buildcmd_8c_source.html#l00551). It adjusts this depending on the value of `ARG_MAX`. Reviewers: alexfh Reviewed By: alexfh Subscribers: llvm-commits Tags: #clang Patch by Austin Belknap! Differential Revision: https://reviews.llvm.org/D47795 llvm-svn: 334295
* Clean up some code in Program.Zachary Turner2018-06-085-33/+30
| | | | | | | | | | NFC here, this just raises some platform specific ifdef hackery out of a class and creates proper platform-independent typedefs for the relevant things. This allows these typedefs to be reused in other places without having to reinvent this preprocessor logic. llvm-svn: 334294
* Add a file open flag that disables O_CLOEXEC.Zachary Turner2018-06-083-10/+27
| | | | | | | | | | | O_CLOEXEC is the right default, but occasionally you don't want this. This is especially true for tools like debuggers where you might need to spawn the child process with specific files already open, but it's occasionally useful in other scenarios as well, like when you want to do some IPC between parent and child. llvm-svn: 334293
* [X86][BtVer2] Limit zero idiom tests to a single iteration.Simon Pilgrim2018-06-081-216/+109
| | | | | | Reduces output size and we're only wanting to check that the instructions are fast-path'd (just Dispatch+Retire) anyhow llvm-svn: 334292
* Fix Wdocumentation warning for unknown param. NFCI.Simon Pilgrim2018-06-081-2/+0
| | | | llvm-svn: 334291
* [X86][SSE] Add SSE2/AVX2 vector rotate tests Simon Pilgrim2018-06-081-9/+137
| | | | | | Now that we're custom lowering vector rotates for SSE in general we should be testing the combines with them as well. llvm-svn: 334290
* [X86][SSE] Simplify combineVectorTruncationWithPACKUS to reduce code duplicationSimon Pilgrim2018-06-087-185/+207
| | | | | | | | | | Simplify combineVectorTruncationWithPACKUS to mask the upper bits followed by calling truncateVectorWithPACK instead of duplicating with similar code. This results in the codegen using (V)PACKUSDW on SSE41+ targets for vXi64/vXi32 inputs where before it always used PACKUSWB (along with a lot more bitcasting). I've raised PR37749 as until we avoid unnecessary concats back to 256-bit for bitwise ops, we can't avoid splitting the input value into 128-bit subvectors for masking. llvm-svn: 334289
* [x86] restore test comment; NFCSanjay Patel2018-06-081-0/+4
| | | | | | | The description got deleted along with the FIXME note in rL334268. llvm-svn: 334288
* [clangd] Require case-insensitive prefix match for macro completions.Sam McCall2018-06-082-2/+13
| | | | | | | | | | | | Summary: Macros are terribly spammy at the moment and this offers some relief. Reviewers: ioeric Subscribers: ilya-biryukov, MaskRay, jkorous, cfe-commits Differential Revision: https://reviews.llvm.org/D47936 llvm-svn: 334287
* [BPI] Apply invoke heuristic before loop branch heuristicArtur Pilipenko2018-06-083-11/+75
| | | | | | | | | | Currently the loop branch heuristic is applied before the invoke heuristic which makes us overestimate the probability of the unwind destination of invokes inside loops. This in turn makes us grossly underestimate the frequencies of loops with invokes. Reviewed By: skatkov, vsk Differential Revision: https://reviews.llvm.org/D47371 llvm-svn: 334285
* [VPlan] Move recipe based VPlan generation to separate function.Florian Hahn2018-06-082-41/+64
| | | | | | | | | | | | | | | | This first step separates VPInstruction-based and VPRecipe-based VPlan creation, which should make it easier to migrate to VPInstruction based code-gen step by step. Reviewers: Ayal, rengolin, dcaballe, hsaito, mkuper, mzolotukhin Reviewed By: dcaballe Subscribers: bollu, tschuett, rkruppe, llvm-commits Differential Revision: https://reviews.llvm.org/D47477 llvm-svn: 334284
* [ADT] Add `StringRef::rsplit(StringRef Separator)`.Henry Wong2018-06-082-8/+31
| | | | | | | | | | | | | | Summary: Add `StringRef::rsplit(StringRef Separator)` to achieve the function of getting the tail substring according to the separator. A typical usage is to get `data` in `std::basic_string::data`. Reviewers: mehdi_amini, zturner, beanz, xbolva00, vsk Reviewed By: zturner, xbolva00, vsk Subscribers: vsk, xbolva00, llvm-commits, MTC Differential Revision: https://reviews.llvm.org/D47406 llvm-svn: 334283
* Fix DynamicRegisterInfo copying/moving issue.Tatyana Krasnukha2018-06-082-23/+51
| | | | | | | | | | | | | | | Summary: Default copy/move constructors and assignment operators leave wrong m_sets[i].registers pointers. Made the class movable and non-copyable (it's difficult to imagine when it needs to be copied). Reviewers: clayborg Reviewed By: clayborg Differential Revision: https://reviews.llvm.org/D47728 llvm-svn: 334282
* [CUDA] Fix emission of constant strings in sectionsJonas Hahnfeld2018-06-082-4/+8
| | | | | | | | | | | | | | | | | | | | | | | CGM.GetAddrOfConstantCString() sets the adress of the created GlobalValue to unnamed. When emitting the object file LLVM will mark the surrounding section as SHF_MERGE iff the string is nul-terminated and contains no other nuls (see IsNullTerminatedString). This results in problems when saving temporaries because LLVM doesn't set an EntrySize, so reading in the serialized assembly file fails. This never happened for the GPU binaries because they usually contain a nul-character somewhere. Instead this only affected the module ID when compiling relocatable device code. However, this points to a potentially larger problem: If we put a constant string into a named section, we really want the data to end up in that section in the object file. To avoid LLVM merging sections this patch unmarks the GlobalVariable's address as unnamed which also fixes the problem of invalid serialized assembly files when saving temporaries. Differential Revision: https://reviews.llvm.org/D47902 llvm-svn: 334281
* [mips] Correct the predicates for a number of codegen only instructionsSimon Dardis2018-06-081-37/+52
| | | | | | | | Reviewers: smaksimovic, atanasyan, abeserminji Differential Revision: https://reviews.llvm.org/D47638 llvm-svn: 334280
* Fix TestMiExec.pyPavel Labath2018-06-081-2/+2
| | | | | | | r334215 changed the error message the tool prints for invalid thread arguments to -exec-next command. This adjust the test to match that. llvm-svn: 334279
* [RISCV] Implement MC layer support for the fence.tso instructionAlex Bradbury2018-06-083-0/+12
| | | | | | | | | | | The instruction makes use of a previously ignored field in the fence instruction. It is introduced in the version 2.3 draft of the RISC-V specification after much work by the Memory Model Task Group. As clarified here <https://github.com/riscv/riscv-isa-manual/issues/186>, the fence.tso assembler mnemonic does not have operands. llvm-svn: 334278
* DebugNamesDWARFIndex: Implement regex version of the GetFunctions methodPavel Labath2018-06-085-13/+61
| | | | | | | | | This also fixes a bug where SymbolFileDWARF was returning the same function multiple times - this can happen if both mangled and demangled names match the regex. Other lookup lookup functions had code to handle this case, but it was forgotten here. llvm-svn: 334277
* [X86][SSE] Consistently prefer lowering to PACKUS over PACKSSSimon Pilgrim2018-06-087-93/+93
| | | | | | | | | | We have some combines/lowerings that attempt to use PACKSS-then-PACKUS and others that use PACKUS-then-PACKSS. PACKUS is much easier to combine with if we know the upper bits are zero as ComputeKnownBits can easily see through BITCASTs etc. especially now that rL333995 and rL334007 have landed. It also effectively works at byte level which further simplifies shuffle combines. The only (minor) annoyances are that ComputeKnownBits can sometimes take longer as it doesn't fail as quickly as ComputeNumSignBits (but I'm not seeing any actual regressions in tests) and PACKUSDW only became available after SSE41 so we have more codegen diffs between targets. llvm-svn: 334276
* [TableGen] Make DAGInstruction own Pattern to avoid leaking it.Florian Hahn2018-06-082-11/+13
| | | | | | | | | | Reviewers: dsanders, craig.topper, stoklund, nhaehnle Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D47525 llvm-svn: 334275
* [clangd] Downrank symbols with reserved names (score *= 0.1)Sam McCall2018-06-083-5/+30
| | | | | | | | | | Reviewers: ilya-biryukov Subscribers: klimek, ioeric, MaskRay, jkorous, cfe-commits Differential Revision: https://reviews.llvm.org/D47707 llvm-svn: 334274
* DebugNamesDWARFIndex: Implement GetFunctions methodPavel Labath2018-06-087-72/+121
| | | | | | | | | | | | | | | | | | | | | | Summary: This patch implements the non-regex variant of GetFunctions. To share more code with the Apple implementation, I've extracted the common filtering code from that class into a utility function on the DWARFIndex base class. The new implementation also searching the accelerator table multiple times -- previously it could happen that the apple table would return the same die more than once if one specified multiple search flags in name_type_mask. This way, I separate table iteration from filtering, and so we can be sure each die is inserted at most once. Reviewers: clayborg, JDevlieghere Subscribers: aprantl, lldb-commits Differential Revision: https://reviews.llvm.org/D47881 llvm-svn: 334273
* [Xray] logging forgotten headerDavid Carlier2018-06-081-0/+1
| | | | | | | | | | | | pthread.h missing for pthread_key* functions. Reviewers: dberris Reviewed By: dberris Differential Revison: https://reviews.llvm.org/D47933 llvm-svn: 334272
* [LV] Fix PR36983. For a given recurrence, fix all phis in exit blockRoman Shirokiy2018-06-082-2/+25
| | | | | | | | | There could be more than one PHIs in exit block using same loop recurrence. Don't assume there is only one and fix each user. Differential Revision: https://reviews.llvm.org/D47788 llvm-svn: 334271
* [clang-tidy] Improve string type matcher for abseil-string-find-starts-with ↵Haojian Wu2018-06-082-3/+21
| | | | | | | | | | | | | | | | check. Summary: This patch improves the check to match the desugared "string" type (so that it can handle custom-implemented string classes), see the newly-added test. Reviewers: alexfh Subscribers: klimek, xazax.hun, cfe-commits Differential Revision: https://reviews.llvm.org/D47704 llvm-svn: 334270
* AMDGPU: Error on LDS global address in functionsMatt Arsenault2018-06-082-1/+18
| | | | | | | These won't work as expected now, so error on them to avoid wasting time debugging this in the future. llvm-svn: 334269
OpenPOWER on IntegriCloud