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* [LLD][ELF] - Fix BB after r350726.George Rimar2019-01-091-1/+1
| | | | | | | D56123 changed the llvm-objdump output format. Now we print the symbol address when dumping. llvm-svn: 350728
* Remove dependency-related arguments in clang-check.Alexander Kornienko2019-01-091-0/+1
| | | | | | | This is the default behavior of clang tools, but clang-check overrides default argument adjusters for some reason. llvm-svn: 350727
* [llvm-objdump] - Print symbol addressed when dumping disassembly output (-d)George Rimar2019-01-092-0/+32
| | | | | | | | | | | | | | | | | | | | When GNU objdump dumps the input with -d it prints the symbol addresses, for example: 0000000000000031 <foo>: 31: 00 00 add %al,(%rax) ... llvm-objdump currently does not do that. Patch changes the behavior to match the GNU objdump. That is useful for implementing -z/--disassemble-zeroes (D56083), it allows omitting first zero bytes and keep the information about the symbol address in the output. Differential revision: https://reviews.llvm.org/D56123 llvm-svn: 350726
* Fix typo in commentNico Weber2019-01-092-4/+4
| | | | llvm-svn: 350725
* Fix typo in commentNico Weber2019-01-091-1/+1
| | | | llvm-svn: 350724
* [pstl] A fix of __pstl namespace usage for ↵Louis Dionne2019-01-091-99/+99
| | | | | | | | include/pstl/internal/glue_algorithm_defs.h Reviewed as https://reviews.llvm.org/D55920 llvm-svn: 350723
* [X86][SSE] Cleanup shuffle combining test check prefixesSimon Pilgrim2019-01-099-1343/+819
| | | | | | Share prefixes whenever possible, use X86 instead of X32. llvm-svn: 350722
* [AMDGPU] Fix DPP combinerValery Pykhtin2019-01-097-396/+703
| | | | | | | | | | | | | | Fixed issue with identity values and other cases, f32/f16 identity values to be added later. fma/mac instructions is disabled for now. Test is fully reworked, added comments. Other fixes: 1. dpp move with uses and old reg initializer should be in the same BB. 2. bound_ctrl:0 is only considered when bank_mask and row_mask are fully enabled (0xF). Othervise the old register value is checked for identity. 3. Added add, subrev, and, or instructions to the old folding function. 4. Kill flag is cleared for the src0 (DPP register) as it may be copied into more than one user. Differential revision: https://reviews.llvm.org/D55444 llvm-svn: 350721
* [clangd] Add a test for SignatureHelp on dynamic index.Haojian Wu2019-01-091-0/+31
| | | | | | | | | | | | Summary: This would catch regressions caused by future changes of the index. Reviewers: ilya-biryukov Subscribers: ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits Differential Revision: https://reviews.llvm.org/D56483 llvm-svn: 350720
* Revert r350647: "[NewPM] Port tsan"Florian Hahn2019-01-098-82/+49
| | | | | | | This patch breaks thread sanitizer on some macOS builders, e.g. http://green.lab.llvm.org/green/job/clang-stage1-configure-RA/52725/ llvm-svn: 350719
* Revert r350648: "Fix clang for r350647: Missed a function rename"Florian Hahn2019-01-091-3/+2
| | | | | | | The related commit r350647 breaks thread sanitizer on some macOS builders, e.g. http://green.lab.llvm.org/green/job/clang-stage1-configure-RA/52725/ llvm-svn: 350718
* [test] Detect glibc-2.27+ and XFAIL appropriate testsMichal Gorny2019-01-093-0/+25
| | | | | | | | | | | | XFAIL the tests known to fail with glibc-2.27+. This takes away the burden of handling known failures from users, and ensures that we will be verbosely informed when they actually start working again. Bug report: https://bugs.llvm.org/show_bug.cgi?id=37804 Differential Revision: https://reviews.llvm.org/D56062 llvm-svn: 350717
* [X86] Enable combining shuffles to PACKSS/PACKUS for 256/512-bit vectorsSimon Pilgrim2019-01-093-21/+10
| | | | llvm-svn: 350716
* Fix clang-tidy test after r350714. NFCIlya Biryukov2019-01-091-0/+1
| | | | llvm-svn: 350715
* [Driver] Fix libcxx detection on Darwin with clang run as ./clangIlya Biryukov2019-01-093-5/+7
| | | | | | | | | | | | | | | | | | | | | | Summary: By using '..' instead of fs::parent_path. The intention of the code was to go from 'path/to/clang/bin' to 'path/to/clang/include'. In most cases parent_path works, however it would fail when clang is run as './clang'. This was noticed in Chromium's bug tracker, see https://bugs.chromium.org/p/chromium/issues/detail?id=919761 Reviewers: arphaman, thakis, EricWF Reviewed By: arphaman, thakis Subscribers: christof, cfe-commits Differential Revision: https://reviews.llvm.org/D56446 llvm-svn: 350714
* Doc: fixed description of a parameter of the __kmpc_taskloopAndrey Churbanov2019-01-091-1/+1
| | | | | | | | Patch by sergi.mateo.bellido@gmail.com Differential Revision: https://reviews.llvm.org/D56432 llvm-svn: 350713
* [MSP430] Optimize 'shl x, 8[+ N] -> swpb(zext(x)) [<< N]' for i16Anton Korobeynikov2019-01-092-7/+29
| | | | | | | | | | Perform additional simplification to reduce shift amount. Patch by Kristina Bessonova! Differential Revision: https://reviews.llvm.org/D56016 llvm-svn: 350712
* [gn build] Run `git ls-files '*.gn' '*.gni' | xargs -n 1 gn format`Nico Weber2019-01-096-22/+17
| | | | | | Looks like I forgot to do that for the PowerPC target. llvm-svn: 350711
* [MSP430] Fix crash while lowering llvm.stacksave/stackrestoreAnton Korobeynikov2019-01-092-0/+15
| | | | | | | | | Perform the usual expansion of stacksave / restore intrinsics. Patch by Kristina Bessonova! Differential Revision: https://reviews.llvm.org/D54890 llvm-svn: 350710
* [gn build] Merge r350669Nico Weber2019-01-091-1/+1
| | | | llvm-svn: 350709
* [gn build] Add a TODO.txt fileNico Weber2019-01-091-0/+30
| | | | | | Differential Revision: https://reviews.llvm.org/D56420 llvm-svn: 350708
* [X86] Add extra test coverage for combining shuffles to PACKSS/PACKUSSimon Pilgrim2019-01-092-0/+94
| | | | llvm-svn: 350707
* [Sparc] Add Sparc V8 supportDaniel Cederman2019-01-0910-2/+325
| | | | | | | | | | | | | | | | | | | | | | Summary: Adds the register class implementation for Sparc. Adds support for DW_CFA_GNU_window_save. Adds save and restore context functionality. On Sparc the return address is the address of the call instruction, so an offset needs to be added when returning to skip the call instruction and its delay slot. If the function returns a struct it is also necessary to skip one extra instruction. Reviewers: jyknight, mclow.lists, mstorsjo, compnerd Reviewed By: compnerd Subscribers: fedor.sergeev, JDevlieghere, ldionne, libcxx-commits Differential Revision: https://reviews.llvm.org/D55763 llvm-svn: 350705
* Use DeclSpec for quals in DeclaratorChunk::FunctionTypeInfo.Anastasia Stulova2019-01-0910-132/+135
| | | | | | | | | | Rather than duplicating data fields, use DeclSpec directly to store the qualifiers for the functions/methods. This change doesn't handle attributes yet and has to be extended further. Differential revision: https://reviews.llvm.org/D55948 llvm-svn: 350703
* [AArch64] Move feature predctrl to predresDiogo N. Sampaio2019-01-098-17/+17
| | | | | | | | | | | Follow up patch of rL350385, for adding predres command line option. This patch renames the feature as to keep it aligned with the option passed by/to clang Differential Revision: https://reviews.llvm.org/D56484 llvm-svn: 350702
* [X86] Fix gcc7 -Wunused-but-set-variable warning. NFCI.Simon Pilgrim2019-01-091-2/+0
| | | | llvm-svn: 350701
* Make the write_cmake_config.py script python3-compatibleAlexander Kornienko2019-01-091-1/+1
| | | | llvm-svn: 350700
* [DebugInfo] Omit location list entries with empty rangesDavid Stenberg2019-01-094-19/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This fixes PR39710. In that case we emitted a location list looking like this: .Ldebug_loc0: .quad .Lfunc_begin0-.Lfunc_begin0 .quad .Lfunc_begin0-.Lfunc_begin0 .short 1 # Loc expr size .byte 85 # DW_OP_reg5 .quad .Lfunc_begin0-.Lfunc_begin0 .quad .Lfunc_end0-.Lfunc_begin0 .short 1 # Loc expr size .byte 85 # super-register DW_OP_reg5 .quad 0 .quad 0 As seen, the first entry's beginning and ending addresses evalute to 0, which meant that the entry inadvertently became an "end of list" entry, resulting in the location list ending sooner than expected. To fix this, omit all entries with empty ranges. Location list entries with empty ranges do not have any effect, as specified by DWARF, so we might as well drop them: "A location list entry (but not a base address selection or end of list entry) whose beginning and ending addresses are equal has no effect because the size of the range covered by such an entry is zero." Reviewers: davide, aprantl, dblaikie Reviewed By: aprantl Subscribers: javed.absar, JDevlieghere, llvm-commits Tags: #debug-info Differential Revision: https://reviews.llvm.org/D55919 llvm-svn: 350698
* GlobalISel: Implement fewerElements for implicit_defMatt Arsenault2019-01-094-4/+78
| | | | llvm-svn: 350697
* [X86] Make the pointer arguments to avx512 gather/scatter intrinsics 'void*' ↵Craig Topper2019-01-093-96/+96
| | | | | | | | to match gcc and Intel's documentation. The avx2 gather intrinsics are documented to use 'int', 'long long', 'float', or 'double' *. So I'm leaving those. This matches gcc. llvm-svn: 350696
* GlobalISel: Implement widenScalar for implicit_defMatt Arsenault2019-01-092-1/+26
| | | | llvm-svn: 350695
* [IPT] Drop cache less eagerly in GVN and LoopSafetyInfoMax Kazantsev2019-01-096-20/+32
| | | | | | | | | | | | | | | | | | | | Current strategy of dropping `InstructionPrecedenceTracking` cache is to invalidate the entire basic block whenever we change its contents. In fact, `InstructionPrecedenceTracking` has 2 internal strictures: `OrderedInstructions` that is needed to be invalidated whenever the contents changes, and the map with first special instructions in block. This second map does not need an update if we add/remove a non-special instuction because it cannot affect the contents of this map. This patch changes API of `InstructionPrecedenceTracking` so that it now accounts for reasons under which we invalidate blocks. This should lead to much less recalculations of the map and should save us some compile time because in practice we don't typically add/remove special instructions. Differential Revision: https://reviews.llvm.org/D54462 Reviewed By: efriedma llvm-svn: 350694
* Revert "[PowerPC] Fix assert from machine verify pass that unmatched ↵Zi Xuan Wu2019-01-093-29/+22
| | | | | | | | | | register class about fcmp selection in fast-isel" This reverts commit r350685. See compile assert in compiler-rt. llvm-svn: 350693
* Mark two more tests as FLAKYEric Fiselier2019-01-092-0/+4
| | | | llvm-svn: 350692
* [NFC] fix trivial typos in commentsHiroshi Inoue2019-01-097-10/+10
| | | | llvm-svn: 350690
* gn build: Copy file permissions from input file in configure_file() emulation.Peter Collingbourne2019-01-091-0/+1
| | | | | | | | | Most significantly, this makes bin/llvm-lit executable so that it can be run in the usual way. Differential Revision: https://reviews.llvm.org/D56423 llvm-svn: 350688
* [X86] Correct the MaskVT for avx512 gather/scatter intrinsics to use the min ↵Craig Topper2019-01-091-4/+7
| | | | | | | | | | of the number of index and data elements. When the result type is v2i64/v2f64 and the index element size is i32, the index vector has two unused elements making the type v4i32. The mask VT should match the number of memory accesses that will be made. This is consistent with the isel patterns used for the target independent gather/scatter intrinsic. llvm-svn: 350687
* gn build: Fix a Python2ism in write_vcsrevision.py.Peter Collingbourne2019-01-091-2/+2
| | | | | | | | | | | | Convert the output of "git rev-parse --short HEAD" to a string before substituting it into the output file. Without this the output file will look like this on Python 3: #define LLVM_REVISION "git-b'6a4895a025f'" Differential Revision: https://reviews.llvm.org/D56459 llvm-svn: 350686
* [PowerPC] Fix assert from machine verify pass that unmatched register class ↵Zi Xuan Wu2019-01-093-22/+29
| | | | | | | | | | | | | | | | | | | | | about fcmp selection in fast-isel Bad machine code: Illegal virtual register for instruction function: TestULE basic block: %bb.0 entry (0x1000a39b158) instruction: %2:crrc = FCMPUD %1:vsfrc, %3:f8rc operand 1: %1:vsfrc Fix assert about missing match between fcmp instruction and register class. We should use vsx related cmp instruction xvcmpudp instead of fcmpu when vsx is opened. add -verifymachineinstrs option into related test cases to enable the verify pass. Differential Revision: https://reviews.llvm.org/D55686 llvm-svn: 350685
* Remove check for single use in ShrinkDemandedConstantStanislav Mekhanoshin2019-01-092-5/+1
| | | | | | | | | | | | | | | This removes check for single use from general ShrinkDemandedConstant to the BE because of the AArch64 regression after D56289/rL350475. After several hours of experiments I did not come up with a testcase failing on any other targets if check is not performed. Moreover, direct call to ShrinkDemandedConstant is not really needed and superceed by SimplifyDemandedBits. Differential Revision: https://reviews.llvm.org/D56406 llvm-svn: 350684
* hwasan: Ignore loads and stores of size 0.Peter Collingbourne2019-01-092-1/+12
| | | | | | | | | | | | | | | | | | Now that memory intrinsics are instrumented, it's more likely that CheckAddressSized will be called with size 0. (It was possible before with IR like: %val = load [0 x i8], [0 x i8]* %ptr but I don't think clang will generate IR like that and the optimizer would normally remove it by the time it got anywhere near our pass anyway). The right thing to do in both cases is to disable the addressing checks (since the underlying memory intrinsic is a no-op), so that's what we do. Differential Revision: https://reviews.llvm.org/D56465 llvm-svn: 350683
* [CMakeLists] Sort tools/CMakeLists.txtJonas Devlieghere2019-01-091-6/+8
| | | | llvm-svn: 350682
* [ARM][AArch64] Increase TLS alignment to reserve space for Android's TCBRyan Prichard2019-01-099-50/+66
| | | | | | | | | | | | | | | | | | | | | | | | ARM and AArch64 use TLS variant 1, where the first two words after the thread pointer are reserved for the TCB, followed by the executable's TLS segment. Both the thread pointer and the TLS segment are aligned to at least the TLS segment's alignment. Android/Bionic historically has not supported ELF TLS, and it has allocated memory after the thread pointer for several Bionic TLS slots (currently 9 but soon only 8). At least one of these allocations (TLS_SLOT_STACK_GUARD == 5) is widespread throughout Android/AArch64 binaries and can't be changed. To reconcile this disagreement about TLS memory layout, set the minimum alignment for executable TLS segments to 8 words on ARM/AArch64, which reserves at least 8 words of memory after the TP (2 for the ABI-specified TCB and 6 for alignment padding). For simplicity, and because lld doesn't know when it's targeting Android, increase the alignment regardless of operating system. Differential Revision: https://reviews.llvm.org/D53906 llvm-svn: 350681
* [libclang] Fix the mismatched delete operator for ExprEvalResultAlex Lorenz2019-01-081-1/+1
| | | | | | | | The '.stringVal' field in ExprEvalResult is allocated using new[], but was freed using a regular delete. That caused memory leaks in the test from r350666. llvm-svn: 350680
* Change std::sort to llvm::sort to detect non-determinism.Jonas Devlieghere2019-01-0817-44/+43
| | | | | | | | | | LLVM added wrappers to std::sort (r327219) that randomly shuffle the container before sorting. The goal is to uncover non-determinism due to undefined sorting order of objects having the same key. This can be enabled with -DLLVM_ENABLE_EXPENSIVE_CHECKS=ON. llvm-svn: 350679
* RegisterCoalescer: Assume CR_Replace for SubRangeJoinMatt Arsenault2019-01-082-0/+124
| | | | | | | | | | | | | | | | | Currently it's possible for following check on V.WriteLanes (which is not really meaningful during SubRangeJoin) to pass for one half of the pair, and then fall through to to one of the impossible or unresolved states. This then fails as inconsistent on the other half. During the main range join, the check between V.WriteLanes and OtherV.ValidLanes must have passed, meaning this should be a CR_Replace. Fixes most of the testcases in bugs 39542 and 39602 llvm-svn: 350678
* [ASTDump] NFC: Move dumpDeclRef to NodeDumperStephen Kelly2019-01-083-45/+46
| | | | | | | | | | Reviewers: aaron.ballman Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D55337 llvm-svn: 350677
* RegisterCoalescer: Defer clearing implicit_def lanesMatt Arsenault2019-01-082-16/+90
| | | | | | | | | | | | | | We can't go back and recover the lanes if it turns out the implicit_def really can't be erased. Assume all lanes are valid if an unresolved conflict is encountered. There aren't any tests where this seems to matter either way, but this seems like a safer option. Fixes bug 39602 llvm-svn: 350676
* Fix unused private field warning.Raphael Isemann2019-01-081-2/+3
| | | | | | | | | | Summary: The member is private and unused if HAVE_LIBCOMPRESSION is undefined, which triggers Clang's -Wunused-private-field warning. Subscribers: lldb-commits Differential Revision: https://reviews.llvm.org/D56458 llvm-svn: 350675
* [InstCombine] remove stale comments; NFCSanjay Patel2019-01-081-6/+0
| | | | | | These changed with rL350672. llvm-svn: 350674
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