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* [X86] Fix copy paste mistake in vector-idiv-v2i32.ll. Add missing test case.Craig Topper2018-08-281-61/+169
| | | | | | Some of the test cases contained the same load twice instead of a different load. llvm-svn: 340833
* [PPC64] Fix DQ-form instruction handling and emit error for misalignment.Sean Fertile2018-08-284-7/+119
| | | | | | | | | | | | | Relanding r340564, original commit message: Fixes the handling of *_DS relocations used on DQ-form instructions where we were overwriting some of the extended opcode bits. Also adds an alignment check so that the user will receive a diagnostic error if the value we are writing is not properly aligned. Differential Revision: https://reviews.llvm.org/D51124 llvm-svn: 340832
* [AMDGPU] Add support for a16 modifiear for gfx9Ryan Taylor2018-08-2812-45/+691
| | | | | | | | | | | | | Summary: Adding support for a16 for gfx9. A16 bit replaces r128 bit for gfx9. Change-Id: Ie8b881e4e6d2f023fb5e0150420893513e5f4841 Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D50575 llvm-svn: 340831
* [llvm-mca] Initialize each element in vector TimelineView::UsedBuffers to a ↵Andrea Di Biagio2018-08-282-14/+18
| | | | | | | | | default invalid buffer descriptor. NFCI Also change the default buffer size for UsedBuffer entries to -1 (i.e. "unknown size"). No functional change intended. llvm-svn: 340830
* [clangd] Switch to Dex by default for the static indexKirill Bobyrev2018-08-281-1/+2
| | | | | | | | | | | | Dex is now mature enough to be used as the default static index. This patch performs the switch but introduces a hidden flag to allow users fallback to Mem in case something happens. Reviewed by: ioeric Differential Revision: https://reviews.llvm.org/D51352 llvm-svn: 340828
* [benchmark] Fix buildbots failing to identify regex supportKirill Bobyrev2018-08-281-0/+2
| | | | | | | | This is cleanup after newly introduced google/benchmark library (rL340809). Many buildbots fail to identify regex engine support, so this should presumably fix the issue. llvm-svn: 340827
* Clarify comment in the string-offsets-table-order.ll testPavel Labath2018-08-281-1/+3
| | | | llvm-svn: 340826
* [llvm-mca][TimelineView] Force the same number of executions for every entry ↵Andrea Di Biagio2018-08-285-89/+125
| | | | | | | | | | | | | | | | | | | in the 'wait-times' table. This patch also uses colors to highlight problematic wait-time entries. A problematic entry is an entry with an high wait time that tends to match (or exceed) the size of the scheduler's buffer. Color RED is used if an instruction had to wait an average number of cycles which is bigger than (or equal to) the size of the underlying scheduler's buffer. Color YELLOW is used if the time (in cycles) spend waiting for the operands or pipeline resources is bigger than half the size of the underlying scheduler's buffer. Color MAGENTA is used if an instruction does not consume buffer resources according to the scheduling model. llvm-svn: 340825
* [ADT] ImmutableList no longer requires elements to be copy constructibleKristof Umann2018-08-282-8/+64
| | | | | | | | | | | ImmutableList used to require elements to have a copy constructor for no good reason, this patch aims to fix this. It also required but did not enforce its elements to be trivially destructible, so a new static_assert is added to guard against misuse. Differential Revision: https://reviews.llvm.org/D49985 llvm-svn: 340824
* Use addressof instead of operator& in make_shared. Fixes PR38729. As a ↵Marshall Clow2018-08-285-3/+35
| | | | | | drive-by, make the same change in raw_storage_iterator (twice). llvm-svn: 340823
* [clangd] Use buffered llvm::errs() in the clangd binary.Eric Liu2018-08-281-0/+3
| | | | | | | | | | | | Summary: Unbuffered stream can cause significant (non-deterministic) latency for the logger. Reviewers: sammccall Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, cfe-commits Differential Revision: https://reviews.llvm.org/D51349 llvm-svn: 340822
* [llvm-mca] Pass an instruction reference when notifying event listeners ↵Andrea Di Biagio2018-08-285-32/+30
| | | | | | about reserved/released buffer resources. NFC llvm-svn: 340821
* [CloneFunction] Constant fold terminators before checking single predecessorMikael Holmen2018-08-282-7/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This fixes PR31105. There is code trying to delete dead code that does so by e.g. checking if the single predecessor of a block is the block itself. That check fails on a block like this bb: br i1 undef, label %bb, label %bb since that has two (identical) predecessors. However, after the check for dead blocks there is a call to ConstantFoldTerminator on the basic block, and that call simplifies the block to bb: br label %bb Therefore we now do the call to ConstantFoldTerminator before the check if the block is dead, so it can realize that it really is. The original behavior lead to the block not being removed, but it was simplified as above, and then we did a call to Dest->replaceAllUsesWith(&*I); with old and new being equal, and an assertion triggered. Reviewers: chandlerc, fhahn Reviewed By: fhahn Subscribers: eraman, llvm-commits Differential Revision: https://reviews.llvm.org/D51280 llvm-svn: 340820
* [TableGen] Use std::move where possible in InstructionMemo constructor. NFCI.Simon Pilgrim2018-08-281-6/+6
| | | | | | Requested in post-commit review for rL339670 llvm-svn: 340819
* [GVNHoist] Prune out useless CHI insertionsAlexandros Lamprineas2018-08-281-2/+5
| | | | | | | | | | Fix for the out-of-memory error when compiling SemaChecking.cpp with GVNHoist and ubsan enabled. I've used a cache for inserted CHIs to avoid excessive memory usage. Differential Revision: https://reviews.llvm.org/D50323 llvm-svn: 340818
* [NFC] Apply another commit to comply with old CMakeKirill Bobyrev2018-08-282-1/+6
| | | | llvm-svn: 340817
* [clangd] Remove unused parameter. NFCIlya Biryukov2018-08-281-6/+5
| | | | llvm-svn: 340816
* [clangd] Add some trace::Spans. NFCIlya Biryukov2018-08-282-0/+2
| | | | llvm-svn: 340815
* [XRay][compiler-rt] Remove uses of internal allocator in profiling modeDean Michael Berris2018-08-281-24/+30
| | | | | | | | | | | | | | | | | | Summary: This change removes further cases where the profiling mode implementation relied on dynamic memory allocation. We're using thread-local aligned (uninitialized) memory instead, which we initialize appropriately with placement new. Addresses llvm.org/PR38577. Reviewers: eizan, kpw Subscribers: jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D51278 llvm-svn: 340814
* [X86][SSE] Improve variable scalar shift of vXi8 vectors (PR34694)Simon Pilgrim2018-08-2811-1000/+415
| | | | | | | | This patch creates the shift mask and actual shift using the vXi16 vector shift ops. Differential Revision: https://reviews.llvm.org/D51263 llvm-svn: 340813
* [XRay][compiler-rt] Stash flags as well in x86_64 trampolineDean Michael Berris2018-08-281-0/+2
| | | | | | | | | | | | | | | | Summary: This change saves and restores the full flags register in x86_64 mode. This makes running instrumented signal handlers safer, and avoids flags set during the execution of the event handlers from polluting the instrumented call's flags state. Reviewers: kpw, eizan, jfb Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D51277 llvm-svn: 340812
* [benchmark] Silence warning by applying upstream patchKirill Bobyrev2018-08-283-15/+20
| | | | | | | | | | | | | | | | | ompiling benchmark library (introduced in D50894) with the latest bootstrapped Clang produces a lot of warnings, this issue was addressed in the upstream patch I pushed earlier. Upstream patch: https://github.com/google/benchmark/commit/f85304e4e3a0e4e1bf15b91720df4a19e90b589f `README.LLVM` notes were updated to reflect the latest changes. Reviewed by: lebedev.ri Differential Revision: https://reviews.llvm.org/D51342 llvm-svn: 340811
* [X86][SSE] Avoid vector extraction/insertion for non-constant uniform shiftsSimon Pilgrim2018-08-287-36/+51
| | | | | | As discussed on D51263, we're better off using byte shifts to clear the upper bits on pre-SSE41 hardware. llvm-svn: 340810
* Pull google/benchmark library to the LLVM treeKirill Bobyrev2018-08-28106-1/+14142
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch pulls google/benchmark v1.4.1 into the LLVM tree so that any project could use it for benchmark generation. A dummy benchmark is added to `llvm/benchmarks/DummyYAML.cpp` to validate the correctness of the build process. The current version does not utilize LLVM LNT and LLVM CMake infrastructure, but that might be sufficient for most users. Two introduced CMake variables: * `LLVM_INCLUDE_BENCHMARKS` (`ON` by default) generates benchmark targets * `LLVM_BUILD_BENCHMARKS` (`OFF` by default) adds generated benchmark targets to the list of default LLVM targets (i.e. if `ON` benchmarks will be built upon standard build invocation, e.g. `ninja` or `make` with no specific targets) List of modifications: * `BENCHMARK_ENABLE_TESTING` is disabled * `BENCHMARK_ENABLE_EXCEPTIONS` is disabled * `BENCHMARK_ENABLE_INSTALL` is disabled * `BENCHMARK_ENABLE_GTEST_TESTS` is disabled * `BENCHMARK_DOWNLOAD_DEPENDENCIES` is disabled Original discussion can be found here: http://lists.llvm.org/pipermail/llvm-dev/2018-August/125023.html Reviewed by: dberris, lebedev.ri Subscribers: ilya-biryukov, ioeric, EricWF, lebedev.ri, srhines, dschuff, mgorny, krytarowski, fedor.sergeev, mgrang, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D50894 llvm-svn: 340809
* [NFC] A loop can never contain Ret instructionMax Kazantsev2018-08-281-1/+1
| | | | llvm-svn: 340808
* Fix in getAllocationDataForFunctionDavid Chisnall2018-08-281-1/+1
| | | | | | | | | | | | | | | | Summary: Correct to use set like behaviour of AllocType. Should check for subset, not precise value. Reviewers: theraven Reviewed By: theraven Subscribers: hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D50959 llvm-svn: 340807
* [LLD][ELF] - Simplify Call-Chain Clustering implementation a bit.George Rimar2018-08-281-16/+10
| | | | | | | | | | Looking at the current implementation and algorithm description, it does not seem we need to keep vector with all edges for each cluster and can just remember the best one. This is NFC change. Differential revision: https://reviews.llvm.org/D50609 llvm-svn: 340806
* [Analyzer] Iterator Checker - Part 3: Invalidation check, first for (copy) ↵Adam Balogh2018-08-285-49/+218
| | | | | | | | | | | assignments We add check for invalidation of iterators. The only operation we handle here is the (copy) assignment. Differential Revision: https://reviews.llvm.org/D32747 llvm-svn: 340805
* [LLD][ELD] - Do not reject INFO output section type when used with a start ↵George Rimar2018-08-284-21/+45
| | | | | | | | | | | | | | | | | | | | address. This is https://bugs.llvm.org/show_bug.cgi?id=38625 LLD accept this: ".stack (INFO) : {", but not this: ".stack address_expression (INFO) :" The patch fixes it. Differential revision: https://reviews.llvm.org/D51027 llvm-svn: 340804
* [LLF][ELF] - Support -z global.George Rimar2018-08-284-6/+11
| | | | | | | | -z global is a flag used on Android (see D49198). Differential revision: https://reviews.llvm.org/D49374 llvm-svn: 340802
* [clang-tidy] Abseil: no namepsace checkHaojian Wu2018-08-2811-0/+186
| | | | | | | | | | This check ensures that users of Abseil do not open namespace absl in their code, as that violates our compatibility guidelines. AbseilMatcher.h written by Hugo Gonzalez. Patch by Deanna Garcia! llvm-svn: 340800
* [X86] Fix some comments to refer to KORTEST not KTEST. NFCCraig Topper2018-08-281-6/+6
| | | | | | KTEST is a different instruction. All of this code uses KORTEST. llvm-svn: 340799
* [X86] Add kortest intrinsics for 8, 32, and 64 bit masks. Add new intrinsic ↵Craig Topper2018-08-288-6/+275
| | | | | | | | names for 16 bit masks. This matches gcc and icc despite not being documented in the Intel Intrinsics Guide. llvm-svn: 340798
* [DAGCombiner][AMDGPU][Mips] Fold bitcast with volatile loads if the ↵Craig Topper2018-08-285-38/+31
| | | | | | | | | | | | | | | | | | | resulting load is legal for the target. Summary: I'm not sure if this patch is correct or if it needs more qualifying somehow. Bitcast shouldn't change the size of the load so it should be ok? We already do something similar for stores. We'll change the type of a volatile store if the resulting store is Legal or Custom. I'm not sure we should be allowing Custom there... I was playing around with converting X86 atomic loads/stores(except seq_cst) into regular volatile loads and stores during lowering. This would allow some special RMW isel patterns in X86InstrCompiler.td to be removed. But there's some floating point patterns in there that didn't work because we don't fold (f64 (bitconvert (i64 volatile load))) or (f32 (bitconvert (i32 volatile load))). Reviewers: efriedma, atanasyan, arsenm Reviewed By: efriedma Subscribers: jvesely, arsenm, sdardis, kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, arichardson, jrtc27, atanasyan, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D50491 llvm-svn: 340797
* [InstCombine] Extend (add (sext x), cst) --> (sext (add x, cst')) and (add ↵Craig Topper2018-08-282-16/+18
| | | | | | | | (zext x), cst) --> (zext (add x, cst')) to work for vectors Differential Revision: https://reviews.llvm.org/D51236 llvm-svn: 340796
* [PPC] Remove Darwin support from POWER backend.Kit Barton2018-08-28131-697/+590
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch issues an error message if Darwin ABI is attempted with the PPC backend. It also cleans up existing test cases, either converting the test to use an alternative triple or removing the test if the coverage is no longer needed. Updated Tests ------------- The majority of test cases were updated to use a different triple that does not include the Darwin ABI. Many tests were also updated to use FileCheck, in place of grep. Deleted Tests ------------- llvm/test/tools/dsymutil/PowerPC/sibling.test was originally added to test specific functionality of dsymutil using an object file created with an old version of llvm-gcc for a Powerbook G4. After a discussion with @JDevlieghere he suggested removing the test. llvm/test/CodeGen/PowerPC/combine_loads_from_build_pair.ll was converted from a PPC test to a SystemZ test, as the behavior is also reproducible there. All other tests that were deleted were specific to the darwin/ppc ABI and no longer necessary. Phabricator Review: https://reviews.llvm.org/D50988 llvm-svn: 340795
* Revert "[CodeGenPrepare] Scan past debug intrinsics to find select ↵David Blaikie2018-08-281-4/+3
| | | | | | | | | | | | | | | candidates (NFC)" This causes crashes due to the interleaved dbg.value intrinsics being left at the end of basic blocks, causing the actual terminators (br, etc) to be not where they should be (not at the end of the block), leading to later crashes. Further discussion on the original commit thread. This reverts commit r340368. llvm-svn: 340794
* [MemorySSA] Add NDEBUG checks to verifiers; NFCGeorge Burgess IV2018-08-281-0/+4
| | | | | | | | verify*() methods are intended to have no side-effects (unless we detect broken MSSA, in which case they assert()), and all of the other verify methods are wrapped by `#ifndef NDEBUG`. llvm-svn: 340793
* Make the DYLD_INSERT_LIBRARIES workaround for SIP more robut for the various ↵Adrian Prantl2018-08-271-4/+8
| | | | | | configurations that bots are running llvm-svn: 340792
* Add a mkdir -p to builddir into lldbtest.pyAdrian Prantl2018-08-271-0/+11
| | | | | | Based on how it is executed, it may not have been yet created. llvm-svn: 340791
* [InstCombine] fix formatting; NFCSanjay Patel2018-08-271-1/+2
| | | | llvm-svn: 340790
* [InstCombine] Add test cases for D51236. NFCCraig Topper2018-08-271-0/+130
| | | | llvm-svn: 340789
* [RuntimeDyld] Add test case that was accidentally left out of r340125.Lang Hames2018-08-271-0/+102
| | | | llvm-svn: 340788
* [InstCombine] allow shuffle+binop canonicalization with widening shufflesSanjay Patel2018-08-272-12/+22
| | | | | | | | This lines up with the behavior of an existing transform where if both operands of the binop are shuffled, we allow moving the binop before the shuffle regardless of whether the shuffle changes the size of the vector. llvm-svn: 340787
* [ORC] Add unit tests for the new RTDyldObjectLinkingLayer2 class.Lang Hames2018-08-272-0/+283
| | | | | | | The new unit tests match the old ones, which will remain in tree until the old RTDyldObjectLinkingLayer is removed. llvm-svn: 340786
* [x86] add AVX runs to show more potential scalar->vector mov opportunities; NFCSanjay Patel2018-08-271-219/+470
| | | | llvm-svn: 340785
* [PATCH] [InstCombine] Fix issue in the simplification of pow() with nested ↵Evandro Menezes2018-08-272-8/+48
| | | | | | | | | | | exp{,2}() Fix the issue of duplicating the call to `exp{,2}()` when it's nested in `pow()`, as exposed by rL340462. Differential revision: https://reviews.llvm.org/D51194 llvm-svn: 340784
* s/std::set/DenseSet/; NFCGeorge Burgess IV2018-08-271-1/+1
| | | | | | | We only use this set for `insert` and `count`, so a hashing container seems better here. llvm-svn: 340783
* [Pipeliner] Fix incorrect phi values in the epilog and kernelBrendon Cahoon2018-08-272-29/+65
| | | | | | | | | | | | | | | | | | | The code that generates the loop definition operand for phis in the epilog and kernel is incorrect in some cases. In the kernel, when a phi refers to another phi, the code that updates PhiOp2 needs to include the stage difference between the two phis. In the epilog, the check for using the loop definition instead of the phi definition uses the StageDiffAdj value (the difference between the phi stage and the loop definition stage), but the adjustment is not needed to determine if the current stage contains an iteration with the loop definition. Differential Revision: https://reviews.llvm.org/D51167 llvm-svn: 340782
* [WebAssembly] TableGen backend for stackifying instructionsThomas Lively2018-08-276-357/+46
| | | | | | | | | | | | | | | | | Summary: The new stackification backend generates the giant switch statement used to translate instructions to their stackified forms. I did this because it was more interesting than adding all the different vector versions of the various SIMD instructions to the switch statment manually. Reviewers: aardappel, aheejin, dschuff Subscribers: mgorny, sbc100, jgravelle-google, sunfish, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D51318 llvm-svn: 340781
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