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* [X86] Add 'Requires<[In64BitMode]>' to a bunch of instructions that only ↵Craig Topper2017-12-154-67/+94
| | | | | | | | have memory and immediate operands. The asm parser wasn't preventing these from being accepted in 32-bit mode. Instructions that use a GR64 register are protected by the parser rejecting the register in 32-bit mode. llvm-svn: 320846
* [X86] Change BNDLDX to use anymem instead of i64mem for itsmemory operand.Craig Topper2017-12-151-1/+1
| | | | | | This instruction doesn't access memory. It juse use a similar looking memory encoding. Don't require Intel syntax to put "qword ptr" in front of it. llvm-svn: 320845
* [X86] Remove the 'Requires' In64BitMode/Not64BitMode from the LWP instructions.Craig Topper2017-12-151-4/+4
| | | | | | These aren't doing anything due to a top level "let Predicates =". I think the GR32/GR64 register class protects these anyway. llvm-svn: 320844
* [X86] Remove the 'Requires<[In64BitMode]>' from SHSTK instructions.Craig Topper2017-12-151-9/+5
| | | | | | This has no effect due to a top level "let Predicates =" around the instructions. But its also not required because the GR64 usage in the instruction guarantees it can never match. llvm-svn: 320843
* [TargetLibraryInfo] fix documentation comment; NFCSanjay Patel2017-12-151-3/+3
| | | | llvm-svn: 320842
* [clang-tidy] Adding Fuchsia checker for virtual inheritanceJulie Hockett2017-12-158-0/+142
| | | | | | | | | | | | Adds a check to the Fuchsia module to warn if classes are defined with virtual inheritance. See https://fuchsia.googlesource.com/zircon/+/master/docs/cxx.md for reference. Differential Revision: https://reviews.llvm.org/D40813 llvm-svn: 320841
* [CodeGen] fix documentation comments; NFCSanjay Patel2017-12-151-10/+7
| | | | llvm-svn: 320840
* [AArch64] Fix typo in the ASIMD instruction optimization passEvandro Menezes2017-12-151-66/+72
| | | | | | | | Fix typo in the representative instruction replacement. Also, fix formatting and reword some comments. llvm-svn: 320839
* fix typo in comment and remove inaccurate comment; NFCSanjay Patel2017-12-152-3/+1
| | | | llvm-svn: 320838
* Fix for bug PR35549 - Repeated schedule comments.Andrew V. Tischenko2017-12-154-18/+24
| | | | | | Differential Revision: https://reviews.llvm.org/D40960 llvm-svn: 320837
* Revert "Re-commit : [LICM] Allow sinking when foldable in loop"Jun Bum Lim2017-12-153-231/+31
| | | | | | This reverts commit r320833. llvm-svn: 320836
* [CodeGen] fix documentation comments; NFCSanjay Patel2017-12-151-10/+6
| | | | llvm-svn: 320835
* Re-commit : [LICM] Allow sinking when foldable in loopJun Bum Lim2017-12-153-31/+231
| | | | | | | | | | | | | | | | | | | | This recommit r320823 after fixing a test failure. Original commit message: Continue trying to sink an instruction if its users in the loop is foldable. This will allow the instruction to be folded in the loop by decoupling it from the user outside of the loop. Reviewers: hfinkel, majnemer, davidxl, efriedma, danielcdh, bmakam, mcrosier Reviewed By: hfinkel Subscribers: javed.absar, bmakam, mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D37076 llvm-svn: 320833
* Updated llvm-objdump to display local relocations in Mach-O binariesMichael Trent2017-12-157-11/+371
| | | | | | | | | | | | | | | | | | | | | | | Summary: llvm-objdump's Mach-O parser was updated in r306037 to display external relocations for MH_KEXT_BUNDLE file types. This change extends the Macho-O parser to display local relocations for MH_PRELOAD files. When used with the -macho option relocations will be displayed in a historical format. All tests are passing for llvm, clang, and lld. llvm-objdump builds without compiler warnings. rdar://35778019 Reviewers: enderby Reviewed By: enderby Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D41199 llvm-svn: 320832
* [ubsan-minimal] Add a path for non-POSIX (and bare-metal) use of the libraryFilipe Cabecinhas2017-12-151-0/+5
| | | | | | | | | | | | | | | | | | | Summary: Hook on -DKERNEL_USE (which is also used in lib/builtins) to not import strlen and not rely on write() being implemented with the stderr on fd 2. With this, the only requirements to use this library are: - "Good enough" std::atomic<void*> and std::atomic<int> - abort() being implemented - ubsan_message(const char*) being implemented Reviewers: eugenis Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D39791 llvm-svn: 320831
* [X86] Fix XSAVE64 and similar instructions to not be allowed by the ↵Craig Topper2017-12-154-43/+34
| | | | | | | | | | assembler in 32-bit mode. There was a top level "let Predicates =" in the .td file that was overriding the Requires on each instruction. I've added an assert to the code emitter to catch more cases like this. I'm sure this isn't the only place where the right predicates aren't being applied. This assert already found that we don't block btq/btsq/btrq in 32-bit mode. llvm-svn: 320830
* Remove "FunctionName -" from docs on FunctionDecl(NFC)Erich Keane2017-12-151-26/+22
| | | | | | | | Removed the repetative usage of the operator name on the documentation for FunctionDecl. Also reflowed some of the comments since this changes the 80 character rule. llvm-svn: 320829
* Revert "[LICM] Allow sinking when foldable in loop"Jun Bum Lim2017-12-153-228/+31
| | | | | | This reverts commit r320823. llvm-svn: 320828
* [CodeGen] Print stack object references as %(fixed-)stack.0 in both MIR and ↵Francis Visoiu Mistrih2017-12-157-28/+55
| | | | | | | | | | | | | | debug output Work towards the unification of MIR and debug output by printing `%stack.0` instead of `<fi#0>`, and `%fixed-stack.0` instead of `<fi#-4>` (supposing there are 4 fixed stack objects). Only debug syntax is affected. Differential Revision: https://reviews.llvm.org/D41027 llvm-svn: 320827
* [OPENMP] Codegen `declare simd` for function declarations.Alexey Bataev2017-12-153-4/+32
| | | | | | | Previously the attributes were emitted only for function definitions. Patch adds emission of the attributes for function declarations. llvm-svn: 320826
* [ThinLTO] Disallow multiple prevailing defsEugene Leviant2017-12-154-24/+6
| | | | | | https://reviews.llvm.org/D41291 llvm-svn: 320825
* [X86] Widen (v2i32 (fp_to_uint v2f64)) to (v8i32 (fp_to_uint v8f64)) during ↵Craig Topper2017-12-152-11/+15
| | | | | | | | legalization if we have AVX512F, but not VLX. NFC Previously we widened it using isel patterns. llvm-svn: 320824
* [LICM] Allow sinking when foldable in loopJun Bum Lim2017-12-153-31/+228
| | | | | | | | | | | | | | | | | Summary: Continue trying to sink an instruction if its users in the loop is foldable. This will allow the instruction to be folded in the loop by decoupling it from the user outside of the loop. Reviewers: hfinkel, majnemer, davidxl, efriedma, danielcdh, bmakam, mcrosier Reviewed By: hfinkel Subscribers: javed.absar, bmakam, mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D37076 llvm-svn: 320823
* [ARM] Some DAG combine testsSam Parker2017-12-152-0/+210
| | | | | | Add some more and and shift load combine tests. llvm-svn: 320822
* [ELF] Reduce size of ELF file produced by testPeter Smith2017-12-151-8/+8
| | | | | | | We only need to exceed 128 Megabytes to provoke the generation of a range extension thunk. This brings the file size down to just over 128 Megabytes. llvm-svn: 320821
* llgs-tests: Add support for "exit" stop-reply packetsPavel Labath2017-12-156-62/+149
| | | | | | | | | | | | | | | | | | Summary: This makes StopReply class abstract, so that we can represent different types of stop replies such as StopReplyStop and StopReplyExit (there should also be a StopReplySignal, but I don't need that right now so I haven't implemented it yet). This prepares the ground for a new test I'm writing. Reviewers: eugene, zturner Subscribers: lldb-commits Differential Revision: https://reviews.llvm.org/D41067 llvm-svn: 320820
* [MIR] Add support for missing CFI directivesFrancis Visoiu Mistrih2017-12-158-48/+181
| | | | | | | | | | | | | | | | | | | The following CFI directives are suported by MC but not by MIR: * .cfi_rel_offset * .cfi_adjust_cfa_offset * .cfi_escape * .cfi_remember_state * .cfi_restore_state * .cfi_undefined * .cfi_register * .cfi_window_save Add support for printing, parsing and update tests. Differential Revision: https://reviews.llvm.org/D41230 llvm-svn: 320819
* Delete a really large test output.Rafael Espindola2017-12-151-0/+3
| | | | llvm-svn: 320818
* Handle a VersymIndex of 0 as an error.Rafael Espindola2017-12-152-5/+5
| | | | | | | | | I noticed that the continue this patch deletes was not tested. Trying to add a test I realized that we never put a VER_NDX_LOCAL symbol in the dynamic symbol table. There doesn't seem to be any reason for a linker to use VER_NDX_LOCAL for a defined shared symbol. llvm-svn: 320817
* Fix 32-bit builds broken by 320813Pavel Labath2017-12-151-2/+2
| | | | | | cast to size_t to avoid narrowing error. llvm-svn: 320816
* [X86] Add RTM schedule testsSimon Pilgrim2017-12-151-0/+61
| | | | llvm-svn: 320815
* [InlineCost] Find repeated loads in the calleeHaicheng Wu2017-12-154-6/+242
| | | | | | | | | | | SROA analysis of InlineCost can figure out that some stores can be removed after inlining and then the repeated loads clobbered by these stores are also free. This patch finds these clobbered loads and adjust the inline cost accordingly. Differential Revision: https://reviews.llvm.org/D33946 llvm-svn: 320814
* ObjectFileELF: Add support for compressed sectionsPavel Labath2017-12-1510-3/+116
| | | | | | | | | | | | | | | | Summary: We use the llvm decompressor to decompress SHF_COMPRESSED sections. This enables us to read data from debug info sections, which are sometimes compressed, particuarly in the split-dwarf case. This functionality is only available if llvm is compiled with zlib support. Reviewers: clayborg, zturner Subscribers: emaste, mgorny, aprantl, lldb-commits Differential Revision: https://reviews.llvm.org/D40616 llvm-svn: 320813
* [X86] Add MWAITX/MONITORX schedule testsSimon Pilgrim2017-12-151-0/+65
| | | | llvm-svn: 320812
* Fix the second build bot break introduced by r320791.Nemanja Ivanovic2017-12-151-0/+7
| | | | llvm-svn: 320811
* [X86] Add XOP schedule testsSimon Pilgrim2017-12-151-0/+998
| | | | llvm-svn: 320810
* llgs-tests: Make addition of new tests easierPavel Labath2017-12-158-100/+189
| | | | | | | | | | | | | | | | | | | Summary: Adding a new test would require one to duplicate a significant part of the existing test that we have. This attempts to reduce that by moving some part of that code to the test fixture. The StandardStartupTest fixture automatically starts up the server and connects it to the client. I also add a more low-level TestBase fixture, which allows one to start up the client and server in a custom way (I am going to need this for the test I am writing). Reviewers: eugene, zturner Subscribers: lldb-commits, mgorny Differential Revision: https://reviews.llvm.org/D41066 llvm-svn: 320809
* Added a separate install target for compilert-rt-headersIlya Biryukov2017-12-151-1/+19
| | | | | | | | | | | | | | | | | | | Summary: This patch adds a new install target `install-compilert-rt-headers`, that is similar to `install-clang-headers`. It allows to install the headers without installing all of compiler-rt. Reviewers: alekseyshl, beanz Reviewed By: beanz Subscribers: smeenai, beanz, mgorny, #sanitizers, kcc, llvm-commits Differential Revision: https://reviews.llvm.org/D41244 llvm-svn: 320808
* [clangd] Build in-memory index on symbols in files.Eric Liu2017-12-156-102/+260
| | | | | | | | | | | | Reviewers: sammccall Reviewed By: sammccall Subscribers: klimek, mgorny, ilya-biryukov, cfe-commits Differential Revision: https://reviews.llvm.org/D41276 llvm-svn: 320807
* Fix code causing fallthrough warnings in the PPC back end.Nemanja Ivanovic2017-12-154-1/+7
| | | | llvm-svn: 320806
* [X86] Add AVX512 VPOPCNTDQ schedule testsSimon Pilgrim2017-12-151-0/+79
| | | | | | Demonstrates how to perform full coverage avx512 schedule tests llvm-svn: 320805
* [clang] Add PPCallbacks list to preprocessor when building a preacompiled ↵Ilya Biryukov2017-12-153-25/+13
| | | | | | | | | | | | | | | | | | | | preamble. Summary: Revision D38639 needs this commit in order to properly make open definition calls on include statements work. Patch by William Enright. Reviewers: malaperle, krasimir, bkramer, ilya-biryukov Reviewed By: malaperle, ilya-biryukov Subscribers: cfe-commits, arphaman, ilya-biryukov Differential Revision: https://reviews.llvm.org/D39375 llvm-svn: 320804
* [ELF] Remove Duplicate .ARM.exidx sectionsPeter Smith2017-12-1510-6/+223
| | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM.exidx section contains a table of 8-byte entries with the first word of each entry an offset to the function it describes and the second word instructions for unwinding if an exception is thrown from that function. The SHF_LINK_ORDER processing will order the table in ascending order of the functions described by the exception table entries. As the address range of an exception table entry is terminated by the next table entry, it is possible to merge consecutive table entries that have identical unwind instructions. For this implementation we define a table entry to be identical if: - Both entries are the special EXIDX_CANTUNWIND. - Both entries have the same inline unwind instructions. We do not attempt to establish if table entries that are references to .ARM.extab sections are identical. This implementation works at a granularity of a single .ARM.exidx InputSection. If all entries in the InputSection are identical to the previous table entry we can remove the InputSection. A more sophisticated but more complex implementation would rewrite InputSection contents so that duplicates within a .ARM.exidx InputSection can be merged. Differential Revision: https://reviews.llvm.org/D40967 llvm-svn: 320803
* [ELF] Add missing test from r320800Peter Smith2017-12-151-0/+115
| | | | | | Forgot to svn add the additional test for the commit. Adding with this one. llvm-svn: 320802
* [ELF] Fix buildbot warning error.Peter Smith2017-12-151-1/+1
| | | | | | Forward declare InputSectionDescription as struct not class. llvm-svn: 320801
* [ELF] Complete implementation of --fix-cortex-a53-843419Peter Smith2017-12-156-85/+552
| | | | | | | | | | | | | | | | | | This patch provides the mechanism to fix instances of the instruction sequence that may trigger the cortex-a53 843419 erratum. The fix is provided by an alternative instruction sequence to remove one of the erratum conditions. To reach this alternative instruction sequence we replace the original instruction with a branch to the alternative sequence. The alternative sequence is responsible for branching back to the original. As there is only erratum to fix the implementation is specific to AArch64 and the specific erratum conditions. It should be generalizable to other targets and erratum if needed. Differential Revision: https://reviews.llvm.org/D36749 llvm-svn: 320800
* [RISCV] Change shift amount operand of RVC shift instructions to ↵Alex Bradbury2017-12-155-10/+49
| | | | | | | | | | | | | | uimmlog2xlennonzero c.slli/c.srli/c.srai allow a 5-bit shift in RV32C and a 6-bit shift in RV64C. This patch adds uimmlog2xlennonzero to reflect this constraint as well as tests. Differential Revision: https://reviews.llvm.org/D41216 Patch by Shiva Chen. llvm-svn: 320799
* Fix the build bot break introduced by r320791.Nemanja Ivanovic2017-12-151-1/+6
| | | | llvm-svn: 320798
* [RISCV] Enable emission of alias instructions by defaultAlex Bradbury2017-12-1554-549/+717
| | | | | | | | | | | | | | | | | | This patch switches the default for -riscv-no-aliases to false and updates all affected MC and CodeGen tests. As recommended in D41071, MC tests use the canonical instructions and the CodeGen tests use the aliases. Additionally, for the f and d instructions with rounding mode, the tests for the aliased versions are moved and tightened such that they can actually detect if alias emission is enabled. (see D40902 for context) Differential Revision: https://reviews.llvm.org/D41225 Patch by Mario Werner. llvm-svn: 320797
* [PM] port Rewrite Statepoints For GC to the new pass manager.Fedor Sergeev2017-12-1550-64/+189
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The port is nearly straightforward. The only complication is related to the analyses handling, since one of the analyses used in this module pass is domtree, which is a function analysis. That requires asking for the results of each function and disallows a single interface for run-on-module pass action. Decided to copy-paste the main body of this pass. Most of its code is requesting analyses anyway, so not that much of a copy-paste. The rest of the code movement is to transform all the implementation helper functions like stripNonValidData into non-member statics. Extended all the related LLVM tests with new-pass-manager use. No failures. Reviewers: sanjoy, anna, reames Reviewed By: anna Subscribers: skatkov, llvm-commits Differential Revision: https://reviews.llvm.org/D41162 llvm-svn: 320796
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