| Commit message (Collapse) | Author | Age | Files | Lines |
| ... | |
| |
|
|
|
|
|
|
| |
This reverts commit eefd2eaad43c5c2b17953ae7ed1e72b28e696f7b.
Apparently, this change was a bit premature.
llvm-svn: 221365
|
| |
|
|
|
|
| |
uninstrumented vararg functions.
llvm-svn: 221364
|
| |
|
|
| |
llvm-svn: 221363
|
| |
|
|
|
|
| |
This incorporates some of the newer functions used by (e.g.) the Go runtime.
llvm-svn: 221362
|
| |
|
|
|
|
| |
ABI list.
llvm-svn: 221361
|
| |
|
|
|
|
|
|
|
|
|
|
|
| |
We currently have no infrastructure to support these correctly.
This is accomplished by generating a call to a runtime library function that
aborts at runtime in place of the regular wrapper for such functions. Direct
calls are rewritten in the usual way during traversal of the caller's IR.
We also remove the "split-stack" attribute from such wrappers, as the code
generator cannot currently handle split-stack vararg functions.
llvm-svn: 221360
|
| |
|
|
|
|
|
| |
Change `NamedMDNode::addOperand()` to take a `Value *` instead of an
`MDNode *`. This is part of PR21433.
llvm-svn: 221359
|
| |
|
|
| |
llvm-svn: 221358
|
| |
|
|
|
|
|
|
|
|
|
|
| |
This DefaultIgnore warning under -Wincomplete-module was firing on
any module map files that happened to be parsed (it's only supposed to
fire on headers), and it has been superceded by
-Wnon-modular-include-in-module anyway.
For compatibility, I rewired -Wincomplete-module to imply
-Wnon-modular-include-in-module.
llvm-svn: 221357
|
| |
|
|
|
|
|
|
|
| |
objects with the powerpc64le name. i.e. asan-powerpc64le.a
This change allows those objects to be built.
Differential Revision: http://reviews.llvm.org/D6043
llvm-svn: 221356
|
| |
|
|
|
|
| |
Differential Revision: http://reviews.llvm.org/D6039
llvm-svn: 221355
|
| |
|
|
| |
llvm-svn: 221354
|
| |
|
|
|
|
| |
Differential Revision: http://reviews.llvm.org/D5797
llvm-svn: 221353
|
| |
|
|
|
|
| |
Differential Revision: http://reviews.llvm.org/D5933
llvm-svn: 221352
|
| |
|
|
|
|
| |
Differential Revision: http://reviews.llvm.org/D5163
llvm-svn: 221351
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This matches the format produced by the AMD proprietary driver.
//==================================================================//
// Shell script for converting .ll test cases: (Pass the .ll files
you want to convert to this script as arguments).
//==================================================================//
; This was necessary on my system so that A-Z in sed would match only
; upper case. I'm not sure why.
export LC_ALL='C'
TEST_FILES="$*"
MATCHES=`grep -v Patterns SIInstructions.td | grep -o '"[A-Z0-9_]\+["e]' | grep -o '[A-Z0-9_]\+' | sort -r`
for f in $TEST_FILES; do
# Check that there are SI tests:
grep -q -e 'verde' -e 'bonaire' -e 'SI' -e 'tahiti' $f
if [ $? -eq 0 ]; then
for match in $MATCHES; do
sed -i -e "s/\([ :]$match\)/\L\1/" $f
done
# Try to get check lines with partial instruction names
sed -i 's/\(;[ ]*SI[A-Z\\-]*: \)\([A-Z_0-9]\+\)/\1\L\2/' $f
fi
done
sed -i -e 's/bb0_1/BB0_1/g' ../../../test/CodeGen/R600/infinite-loop.ll
sed -i -e 's/SI-NOT: bfe/SI-NOT: {{[^@]}}bfe/g'../../../test/CodeGen/R600/llvm.AMDGPU.bfe.*32.ll ../../../test/CodeGen/R600/sext-in-reg.ll
sed -i -e 's/exp_IEEE/EXP_IEEE/g' ../../../test/CodeGen/R600/llvm.exp2.ll
sed -i -e 's/numVgprs/NumVgprs/g' ../../../test/CodeGen/R600/register-count-comments.ll
sed -i 's/\(; CHECK[-NOT]*: \)\([A-Z_0-9]\+\)/\1\L\2/' ../../../test/CodeGen/R600/select64.ll ../../../test/CodeGen/R600/sgpr-copy.ll
//==================================================================//
// Shell script for converting .td files (run this last)
//==================================================================//
export LC_ALL='C'
sed -i -e '/Patterns/!s/\("[A-Z0-9_]\+[ "e]\)/\L\1/g' SIInstructions.td
sed -i -e 's/"EXP/"exp/g' SIInstrInfo.td
llvm-svn: 221350
|
| |
|
|
| |
llvm-svn: 221349
|
| |
|
|
|
|
|
|
| |
_Unwind_Backtrace is not clearly defined in EHABI and needs more
testing. A bug was created with some initial investigation done
http://llvm.org/PR21444. This test fails with both libunwind and libgcc_s.
llvm-svn: 221348
|
| |
|
|
| |
llvm-svn: 221347
|
| |
|
|
| |
llvm-svn: 221346
|
| |
|
|
|
|
| |
Setting it to true causes all executables to be statically linked.
llvm-svn: 221345
|
| |
|
|
| |
llvm-svn: 221344
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch improves the folding of vector AND nodes into blend operations for
targets that feature SSE4.1. A vector AND node where one of the operands is
a constant build_vector with elements that are either zero or all-ones can be
converted into a blend.
This allows for example to simplify the following code:
define <4 x i32> @test(<4 x i32> %A, <4 x i32> %B) {
%1 = and <4 x i32> %A, <i32 0, i32 0, i32 0, i32 -1>
%2 = and <4 x i32> %B, <i32 -1, i32 -1, i32 -1, i32 0>
%3 = or <4 x i32> %1, %2
ret <4 x i32> %3
}
Before this patch llc (-mcpu=corei7) generated:
andps LCPI1_0(%rip), %xmm0, %xmm0
andps LCPI1_1(%rip), %xmm1, %xmm1
orps %xmm1, %xmm0, %xmm0
retq
With this patch we generate a single 'vpblendw'.
llvm-svn: 221343
|
| |
|
|
| |
llvm-svn: 221342
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Some ARM FPUs only have 16 double-precision registers, rather than the
normal 32. LLVM represents this with the D16 target feature. This is
currently used by CodeGen to avoid using high registers when they are
not available, but the assembler and disassembler do not.
I fix this in the assmebler and disassembler rather than the
InstrInfo.td files, as the latter would require a large number of
changes everywhere one of the floating-point instructions is referenced
in the backend. This solution is similar to the one used for
co-processor numbers and MSR masks.
llvm-svn: 221341
|
| |
|
|
|
|
|
| |
Parameters of type std::nullptr_t can only have one value, so it doesn't make
sense to name them.
llvm-svn: 221340
|
| |
|
|
| |
llvm-svn: 221339
|
| |
|
|
|
|
|
|
|
|
|
|
| |
Before:
SOME_WEIRD_LOG_MACRO
<< "Something long enough to cause a line break";
After:
SOME_WEIRD_LOG_MACRO
<< "Something long enough to cause a line break";
llvm-svn: 221338
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
| |
The test refers to user_regs_struct.rip so it can only ever have worked
on x86-64. Put this code inside an appropriate #if, and add a similar
case for PowerPC64. (If we do likewise for ARM we can probably remove
the XFAILs, but I have no way of testing that.)
Those changes are enough to get the test working for me on big-endian
PowerPC64 Fedora 19.
Differential Revision: http://reviews.llvm.org/D6108
llvm-svn: 221337
|
| |
|
|
|
|
| |
virtual registers involved have uses/defs chains connecting them to physical register. Fix up the tests that this change improves.
llvm-svn: 221336
|
| |
|
|
|
|
|
|
|
| |
Many programs, for reasons unknown, really like to look at the
AddressOfRelocationTable to determine whether or not they are looking at
a bona fide PE file. Without this, programs like the UNIX `file'
utility will insist that they are looking at a MS DOS executable.
llvm-svn: 221335
|
| |
|
|
|
|
|
|
|
|
|
|
|
| |
Use %/T instead of %T.
LLVM Parser decodes "\bb" as hex in "C:\bb-win7\buildername\build...", with MDString.
See also, http://llvm.org/docs/LangRef.html#metadata-nodes-and-metadata-strings
This reverts r221270, "Disable 3 tests in llvm/test/Transforms/GCOVProfiling/ for now. Investigating."
FIXME: Please check EC in GCOVProfiler::emitProfileNotes().
llvm-svn: 221334
|
| |
|
|
| |
llvm-svn: 221333
|
| |
|
|
| |
llvm-svn: 221332
|
| |
|
|
|
|
|
|
|
| |
Commit 220932 caused crash when building clang-tblgen on aarch64 debian target,
so it's blocking all daily tests.
The std::call_once implementation in pthread has bug for aarch64 debian.
llvm-svn: 221331
|
| |
|
|
|
|
|
| |
This makes the emacs integration ``provide`` a clang-format feature,
so that a .emacs can ``require`` it.
llvm-svn: 221330
|
| |
|
|
|
|
|
|
|
| |
LLD skipped COMDAT section symbols when reading them because
I thought we don't want to have symbols with the same name.
But they are actually needed because relocations may refer to
the section symbols. So we shoulnd't skip them.
llvm-svn: 221329
|
| |
|
|
| |
llvm-svn: 221328
|
| |
|
|
| |
llvm-svn: 221327
|
| |
|
|
|
|
|
|
| |
descriptor.
rdar://problem/15984431
llvm-svn: 221326
|
| |
|
|
|
|
|
|
|
| |
Exact shifts may not shift out any non-zero bits. Use computeKnownBits
to determine when this occurs and just return the left hand side.
This fixes PR21477.
llvm-svn: 221325
|
| |
|
|
|
|
| |
launching LLGS process. Differential Revision: http://reviews.llvm.org/D6105
llvm-svn: 221324
|
| |
|
|
|
|
|
|
| |
-Wno-comment to the compilation flags if so.
Patch by Filipe Cabecinhas, configure regenerated by me.
llvm-svn: 221323
|
| |
|
|
|
|
|
|
|
|
|
|
| |
Renamed monitor -> driver, to make clear that the implementation here
is in no way related to that of other process plugins which have also
implemented classes with similar names such as DebugMonitor.
Also created a DebugEventHandler interface, which will be used by
implementors to get notified when debugging events happen in the
inferiors.
llvm-svn: 221322
|
| |
|
|
|
|
|
|
|
|
| |
We currently try to push an even number of registers to preserve 8-byte
alignment during a function's prologue, but only when the stack alignment is
prcisely 8. Many of the reasons for doing it apply also when that alignment > 8
(the extra store is often free, and can save another stack adjustment, though
less frequently for 16-byte stack alignment).
llvm-svn: 221321
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
We were making an attempt to do this by adding an extra callee-saved GPR (so
that there was an even number in the list), but when that failed we went ahead
and pushed anyway.
This had a couple of potential issues:
+ The .cfi directives we emit misplaced dN because they were based on
PrologEpilogInserter's calculation.
+ Unaligned stores can be less efficient.
+ Unaligned stores can actually fault (likely only an issue in niche cases,
but possible).
This adds a final explicit stack adjustment if all other options fail, so that
the actual locations of the registers match up with where they should be.
llvm-svn: 221320
|
| |
|
|
| |
llvm-svn: 221319
|
| |
|
|
|
|
|
|
|
|
|
|
|
| |
Divides and remainder operations do not behave like other operations
when they are given poison: they turn into undefined behavior.
It's really hard to know if the operands going into a div are or are not
poison. Because of this, we should only choose to speculate if there
are constant operands which we can easily reason about.
This fixes PR21412.
llvm-svn: 221318
|
| |
|
|
|
|
|
|
|
|
|
|
| |
This reverts commit r221171.
It performs this invalid transformation:
- %div.i = urem i64 -1, %add
- %sub.i = sub i64 -2, %div.i
+ %div.i = urem i64 1, %add
+ %sub.i1 = add i64 %div.i, -2
llvm-svn: 221317
|
| |
|
|
|
|
| |
http://reviews.llvm.org/D6018
llvm-svn: 221316
|