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* ARM: add intrinsics for the v8 ldaex/stlexTim Northover2014-03-266-26/+194
| | | | | | | | | We've already got versions without the barriers, so this just adds IR-level support for generating the new v8 ones. rdar://problem/16227836 llvm-svn: 204813
* Clarify llvm.clear_cache description.Joerg Sonnenberger2014-03-261-20/+13
| | | | llvm-svn: 204812
* [mips] Hoist common functionality into a new function.Matheus Almeida2014-03-261-29/+30
| | | | | | | | | | Given that we support multiple directives that enable a particular feature (e.g. '.set mips16'), it's best to hoist that code into a new function so that we don't repeat the same pattern w.r.t parsing and handling error cases. No functional changes. llvm-svn: 204811
* tsan: add pthread_barrier_t testDmitry Vyukov2014-03-261-0/+37
| | | | llvm-svn: 204810
* tsan: fix deadlock during forkDmitry Vyukov2014-03-261-3/+3
| | | | | | ReportRace takes the two mutexes in the opposite order llvm-svn: 204809
* tsan: fix another compiler-injected memsetDmitry Vyukov2014-03-261-1/+2
| | | | | | newer gcc inserts memset here llvm-svn: 204808
* ARM: be more flexible about how --mhwdiv is accepted.Tim Northover2014-03-262-1/+7
| | | | | | Patch by Gabor Ballabas. llvm-svn: 204807
* Change @llvm.clear_cache default to call rt-libRenato Golin2014-03-264-15/+16
| | | | | | | | | | | After some discussion on IRC, emitting a call to the library function seems like a better default, since it will move from a compiler internal error to a linker error, that the user can work around until LLVM is fixed. I'm also adding a note on the responsibility of the user to confirm that the cache was cleared on platforms where nothing is done. llvm-svn: 204806
* [mips] The decision to use MO_GOT_PAGE and MO_GOT_OFST depends on the ABI ↵Daniel Sanders2014-03-262-9/+11
| | | | | | | | | | | | | | being N32 or N64 not the arch being MIPS64 Summary: No functional change (in supported use cases) Reviewers: matheusalmeida Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D3177 llvm-svn: 204805
* Fix AVX512 Gather and Scatter execution domains.Cameron McInally2014-03-262-7/+94
| | | | llvm-svn: 204804
* [mips] Add support for '.option pic2'.Matheus Almeida2014-03-265-0/+52
| | | | | | | | | The directive '.option pic2' enables PIC from assembly source. At the moment none of the macros/directives check the PIC bit but that's going to be fixed relatively soon. For example, the expansion of macros like 'la' depend on the relocation model. llvm-svn: 204803
* Add @llvm.clear_cache builtinRenato Golin2014-03-2610-0/+135
| | | | | | | | | | | | | | | | | Implementing the LLVM part of the call to __builtin___clear_cache which translates into an intrinsic @llvm.clear_cache and is lowered by each target, either to a call to __clear_cache or nothing at all incase the caches are unified. Updating LangRef and adding some tests for the implemented architectures. Other archs will have to implement the method in case this builtin has to be compiled for it, since the default behaviour is to bail unimplemented. A Clang patch is required for the builtin to be lowered into the llvm intrinsic. This will be done next. llvm-svn: 204802
* [PowerPC] Lower VSELECT using xxsel when VSX is availableHal Finkel2014-03-263-3/+99
| | | | | | | | With VSX there is a real vector select instruction, and so we should use it. Note that VSELECT will still scalarize for v2f64 because the corresponding SetCC result type (v2i64) is not currently a legal type. llvm-svn: 204801
* [sanitizer] Intercept __aeabi_mem(set|cpy|move).Evgeniy Stepanov2014-03-263-1/+123
| | | | llvm-svn: 204800
* Define uintptr_t in the profiling sources on x86_64 FreeBSD in 32-bit modeViktor Kutuzov2014-03-261-0/+1
| | | | llvm-svn: 204799
* From Matt Thomas: use long long for [u]int64_t and [u]intmax_t onJoerg Sonnenberger2014-03-262-10/+14
| | | | | | NetBSD/aarch64 to simplify code sharing with NetBSD/arm. llvm-svn: 204798
* [mips] Add tests for t0-t3 for N32/N64Daniel Sanders2014-03-261-33/+40
| | | | | | | These are aliases of t4-t7 and are provided for compatibility with both the original ABI documentation (using t4-t7) and GNU As (using t0-t3) llvm-svn: 204797
* [mips] The register names depend on the ABI being N32/N64 rather than the ↵Daniel Sanders2014-03-264-16/+64
| | | | | | | | | | | | | | arch being mips64 Summary: Added test cases for O32 and N32 on MIPS64. Reviewers: matheusalmeida Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D3175 llvm-svn: 204796
* Follow-up to r204790: don't try to emit line tables if there are no ↵Timur Iskhodzhanov2014-03-262-2/+61
| | | | | | functions with DI in the TU llvm-svn: 204795
* [ASan] Fix a thinko spotted by Evgeniy Stepanov: use REAL(memcpy) on non-OSX ↵Alexander Potapenko2014-03-261-4/+1
| | | | | | systems. llvm-svn: 204794
* [mips] $s8 is an alias for $fp in all ABI's, not just N32/N64.Daniel Sanders2014-03-263-3/+4
| | | | llvm-svn: 204793
* [mips] Move the CHECK lines in mips*-register-names.s to make it more ↵Daniel Sanders2014-03-262-128/+64
| | | | | | | | | obvious which CHECK matches with which insn This reveals a small mistake in mips-register-names.s ($sp is tested twice and $s8 is not tested) which will be fixed in a follow-up commit. llvm-svn: 204792
* Add tests for r204790Timur Iskhodzhanov2014-03-262-0/+166
| | | | llvm-svn: 204791
* Fix PR19239 - Add support for generating debug info for functions without ↵Timur Iskhodzhanov2014-03-262-16/+12
| | | | | | lexical scopes and/or debug info at all llvm-svn: 204790
* Use -LABEL checks in the COFF debug info testsTimur Iskhodzhanov2014-03-264-20/+20
| | | | llvm-svn: 204788
* Make the 'for (auto ...)' names more readableTimur Iskhodzhanov2014-03-261-34/+35
| | | | llvm-svn: 204787
* Fix PR19066 - 0-sized vftable in the presence of virtual inheritanceTimur Iskhodzhanov2014-03-262-1/+25
| | | | | | Reviewed at http://llvm-reviews.chandlerc.com/D3181 llvm-svn: 204786
* Revert "Update for llvm api change."Rafael Espindola2014-03-261-1/+1
| | | | | | This reverts commit r204783. llvm-svn: 204785
* Revert "Prevent alias from pointing to weak aliases."Rafael Espindola2014-03-2618-58/+61
| | | | | | | | | This reverts commit r204781. I will follow up to with msan folks to see what is what they were trying to do with aliases to weak aliases. llvm-svn: 204784
* Update for llvm api change.Rafael Espindola2014-03-261-1/+1
| | | | llvm-svn: 204783
* [PowerPC] Generate logical vector VSX instructionsHal Finkel2014-03-262-5/+168
| | | | | | | These instructions are essentially the same as their Altivec counterparts, but have access to the larger VSX register file. llvm-svn: 204782
* Prevent alias from pointing to weak aliases.Rafael Espindola2014-03-2618-61/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Aliases are just another name for a position in a file. As such, the regular symbol resolutions are not applied. For example, given define void @my_func() { ret void } @my_alias = alias weak void ()* @my_func @my_alias2 = alias void ()* @my_alias We produce without this patch: .weak my_alias my_alias = my_func .globl my_alias2 my_alias2 = my_alias That is, in the resulting ELF file my_alias, my_func and my_alias are just 3 names pointing to offset 0 of .text. That is *not* the semantics of IR linking. For example, linking in a @my_alias = alias void ()* @other_func would require the strong my_alias to override the weak one and my_alias2 would end up pointing to other_func. There is no way to represent that with aliases being just another name, so the best solution seems to be to just disallow it, converting a miscompile into an error. llvm-svn: 204781
* DebugInfo: Add fission-related sections to COFFDavid Blaikie2014-03-262-1/+28
| | | | | | | Allows this test to pass on COFF platforms so we don't need to restrict this test to a single target anymore. llvm-svn: 204780
* Remove annotation for llvm.org/pr19241Ed Maste2014-03-261-1/+0
| | | | | | The issue has been fixed by r204745 and r204750 llvm-svn: 204779
* Implement LWG issue #2135. If something goes wrong in ↵Marshall Clow2014-03-263-5/+5
| | | | | | condition_variable::wait, call terminate() rather than throwing an error. Do this indirectly, by marking the call as 'noexcept'. This is better than just calling terminate() directly, because it gives a better error message on the console. llvm-svn: 204778
* Add tests that should fail when lock() throws. THis is part of LWG issue ↵Marshall Clow2014-03-262-0/+104
| | | | | | #2135. No library changes here. llvm-svn: 204777
* Add existing warnings to -Waddress so that it works closer to what GCC has.Richard Trieu2014-03-263-4/+30
| | | | | | | | Previously, -Waddress was empty. Fixes PR9043. llvm-svn: 204776
* Move the -i[no-]system-prefix options from CC1Options.td to Options.td.Alexander Kornienko2014-03-265-18/+22
| | | | | | | | | | | | | | | | Summary: This allows them to be used without -cc1 the same way as -I and -isystem. Renamed the options to --system-header-prefix=/--no-system-header-prefix to avoid interference with -isystem and make the intent of the option cleaner. Reviewers: rsmith Reviewed By: rsmith CC: cfe-commits Differential Revision: http://llvm-reviews.chandlerc.com/D3185 llvm-svn: 204775
* [lit] Environment variables get stripped in lit. Manually specify locale.Michael J. Spencer2014-03-261-1/+1
| | | | llvm-svn: 204774
* [lit] Python 3.Michael J. Spencer2014-03-263-5/+6
| | | | llvm-svn: 204773
* Remove safeguard from RoundTripYAML pass.Rui Ueyama2014-03-261-14/+6
| | | | | | | | | | | | RoundTripYAML pass is removed from the regular execution pass in r204296, so the safeguard to protect it from OOM error is no longer needed, because we are sure that the pass is only used for tests, and test files are all small. We also want to see RoundTripYAML pass to fail in tests if it fails, rather than silently skipping failing tests. llvm-svn: 204772
* Correctly detect if a symbol uses a reserved section index or not.Rafael Espindola2014-03-262-4/+28
| | | | | | | The logic was incorrect for variables, causing them to end up in the wrong section if the section had an index >= 0xff00. llvm-svn: 204771
* [X86] Add broadcast instructions to the table used by ExeDepsFix pass.Quentin Colombet2014-03-264-10/+144
| | | | | | | | | | | | | | | | | | | | | Adds the different broadcast instructions to the ReplaceableInstrsAVX2 table. That way the ExeDepsFix pass can take better decisions when AVX2 broadcasts are across domain (int <-> float). In particular, prior to this patch we were generating: vpbroadcastd LCPI1_0(%rip), %ymm2 vpand %ymm2, %ymm0, %ymm0 vmaxps %ymm1, %ymm0, %ymm0 ## <- domain change penalty Now, we generate the following nice sequence where everything is in the float domain: vbroadcastss LCPI1_0(%rip), %ymm2 vandps %ymm2, %ymm0, %ymm0 vmaxps %ymm1, %ymm0, %ymm0 <rdar://problem/16354675> llvm-svn: 204770
* Create .symtab_shndxr only when needed.Rafael Espindola2014-03-255-158685/+338
| | | | | | | | | | | | | | | | | | | | | | | We need .symtab_shndxr if and only if a symbol references a section with an index >= 0xff00. The old code was trying to figure out if the section was needed ahead of time, making it a fairly dependent on the code actually writing the table. It was also somewhat conservative and would create the section in cases where it was not needed. If I remember correctly, the old structure was there so that the sections were created in the same order gas creates them. That was valuable when MC's support for ELF was new and we tested with elf-dump.py. This patch refactors the symbol table creation to another class and makes it obvious that .symtab_shndxr is really only created when we are about to output a reference to a section index >= 0xff00. While here, also improve the tests to use macros. One file is one section short of needing .symtab_shndxr, the second one has just the right number. llvm-svn: 204769
* [PowerPC] Select between VSX A-type and M-type FMA instructions just before RAHal Finkel2014-03-254-0/+407
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The VSX instruction set has two types of FMA instructions: A-type (where the addend is taken from the output register) and M-type (where one of the product operands is taken from the output register). This adds a small pass that runs just after MI scheduling (and, thus, just before register allocation) that mutates A-type instructions (that are created during isel) into M-type instructions when: 1. This will eliminate an otherwise-necessary copy of the addend 2. One of the product operands is killed by the instruction The "right" moment to make this decision is in between scheduling and register allocation, because only there do we know whether or not one of the product operands is killed by any particular instruction. Unfortunately, this also makes the implementation somewhat complicated, because the MIs are not in SSA form and we need to preserve the LiveIntervals analysis. As a simple example, if we have: %vreg5<def> = COPY %vreg9; VSLRC:%vreg5,%vreg9 %vreg5<def,tied1> = XSMADDADP %vreg5<tied0>, %vreg17, %vreg16, %RM<imp-use>; VSLRC:%vreg5,%vreg17,%vreg16 ... %vreg9<def,tied1> = XSMADDADP %vreg9<tied0>, %vreg17, %vreg19, %RM<imp-use>; VSLRC:%vreg9,%vreg17,%vreg19 ... We can eliminate the copy by changing from the A-type to the M-type instruction. This means: %vreg5<def,tied1> = XSMADDADP %vreg5<tied0>, %vreg17, %vreg16, %RM<imp-use>; VSLRC:%vreg5,%vreg17,%vreg16 is replaced by: %vreg16<def,tied1> = XSMADDMDP %vreg16<tied0>, %vreg18, %vreg9, %RM<imp-use>; VSLRC:%vreg16,%vreg18,%vreg9 and we remove: %vreg5<def> = COPY %vreg9; VSLRC:%vreg5,%vreg9 llvm-svn: 204768
* [PGO] Add simplified branch weights for Objective-C for-collection loops.Bob Wilson2014-03-252-9/+15
| | | | | | | | | | | | | Conceptually one of these loops is just a while-loop, but the actual code-gen is more complicated. We don't instrument all the different control flow edges to get accurate counts for each conditional branch, nor do I think it makes sense to do so. Instead, make the simplifying assumption that the loop behaves like a while-loop. Use the same branch weights for the first check for an empty collection as would be used for the back-edge of a while loop, and use that same weighting for the innermost loop, ignoring the possibility that there may be some extra code to go fetch more elements. llvm-svn: 204767
* llvm/test/DebugInfo/empty.ll: Suppress crash for targeting pecoff while ↵NAKAMURA Takumi2014-03-251-1/+1
| | | | | | investigating. llvm-svn: 204766
* Use Endian.h to simplify this code a bit.Rafael Espindola2014-03-252-108/+68
| | | | | | | While at it, factor some logic into FragmentWriter. This will allow more code to be factored out of the fairly large ELFObjectWriter. llvm-svn: 204765
* Made the Materializer not write back variablesSean Callanan2014-03-251-5/+23
| | | | | | | | | | | if they didn't change, just like it does for registers. This makes life easier for kernel debugging and any other situation where values are read-only. <rdar://problem/16367795> llvm-svn: 204764
* Add a test case for the previous commitEnrico Granata2014-03-253-0/+83
| | | | llvm-svn: 204763
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