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* Rename ExitCount to BackedgeTakenCount, because that's what it is.James Molloy2015-09-091-8/+9
| | | | | | We called a variable ExitCount, stored the backedge count in it, then redefined it to be the exit count again. llvm-svn: 247140
* Delay predication of stores until near the end of vector code generationJames Molloy2015-09-092-65/+62
| | | | | | | | Predicating stores requires creating extra blocks. It's much cleaner if we do this in one pass instead of mutating the CFG while writing vector instructions. Besides which we can make use of helper functions to update domtree for us, reducing the work we need to do. llvm-svn: 247139
* [ARM] "cortex-r5f" and "cortex-m4f" are unknown names for clang.Alexandros Lamprineas2015-09-091-7/+2
| | | | | | | | | | | | The tests in test/CodeGen/arm-target-features.c are currently passing but warning messages are suppressed. These tests are now synchronized with the corresponding changes in Target Parser. This patch will fix the regressions in clang caused by r247136 Differential Revision: http://reviews.llvm.org/D12722 llvm-svn: 247138
* Fix type in include header nameTamas Berghammer2015-09-091-1/+1
| | | | llvm-svn: 247137
* LLVM does not distinguish Cortex-M4 from Cortex-M4F neither Cortex-R5 from R5F.Alexandros Lamprineas2015-09-091-5/+2
| | | | | | | | | | | Removed "cortex-r5f" and "cortex-m4f" from Target Parser, sinced they are unknown cpu names for llvm and clang. Also updated default FPUs for R5 and M4 accordingly. Differential Revision: http://reviews.llvm.org/D12692 Change-Id: Ib81c7216521a361d8ee1296e4b6a2aa00bd479c5 llvm-svn: 247136
* Add missing include after rL247131Tamas Berghammer2015-09-091-0/+1
| | | | llvm-svn: 247135
* [LLDB][MIPS] Added support for the debugging of N32/O32 applications on ↵Mohit K. Bhakkad2015-09-093-12/+34
| | | | | | | | | | | | MIPS64 target. Patch by Nitesh Jain Reviewers: clayborg, ovyalov. Subscribers: jaydeep, bhushan, mohit.bhakkad, sagar, nitesh.jain, lldb-commits. Differential Revision: http://reviews.llvm.org/D12671 llvm-svn: 247134
* Change the looping stack detection codeTamas Berghammer2015-09-091-14/+16
| | | | | | | | | | | In some special case (e.g. signal handlers, hand written assembly) it is valid to have 2 stack frame with the same CFA value. This CL change the looping stack detection code to report a loop only if at least 3 consecutive frames have the same CFA. Differential revision: http://reviews.llvm.org/D12699 llvm-svn: 247133
* Add basic fission support to SymbolFileDWARFTamas Berghammer2015-09-0925-532/+1045
| | | | | | | | | | | | | * Create new dwo symbol file class * Add handling for .dwo sections * Change indexes in SymbolFileDWARF to store compile unit offset next to DIE offset * Propagate queries from dwarf compile unit to the dwo compile unit where applicable Differential revision: http://reviews.llvm.org/D12291 llvm-svn: 247132
* Code cleanup in preparation of adding split dwarf supportTamas Berghammer2015-09-098-859/+865
| | | | | | | | | | | | * Remove some unused code * Remove usage of DWARFDebugInfoEntry::Attributes where usage isn't reasonable * Cleanup DWARFMappedHash with separating it to header and implementation file and fixing the visibility of the functions Differential revision: http://reviews.llvm.org/D12374 llvm-svn: 247131
* Remove the dwo files in the cleanup stage of the testsTamas Berghammer2015-09-091-2/+4
| | | | | | The dwo files are generated when the tests run with split dwarf info. llvm-svn: 247130
* [LLDB][MIPS] MIPS load/store instruction emulation for hardware watchpointsMohit K. Bhakkad2015-09-094-77/+328
| | | | | | | | Reviewers: clayborg. Subscribers: jaydeep, bhushan, sagar, nitesh.jain, lldb-commits. Differential Revision: http://reviews.llvm.org/D12670 llvm-svn: 247129
* Fix vector splitting for extract_vector_elt and vector elements of <8-bits.Daniel Sanders2015-09-093-2/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: One of the vector splitting paths for extract_vector_elt tries to lower: define i1 @via_stack_bug(i8 signext %idx) { %1 = extractelement <2 x i1> <i1 false, i1 true>, i8 %idx ret i1 %1 } to: define i1 @via_stack_bug(i8 signext %idx) { %base = alloca <2 x i1> store <2 x i1> <i1 false, i1 true>, <2 x i1>* %base %2 = getelementptr <2 x i1>, <2 x i1>* %base, i32 %idx %3 = load i1, i1* %2 ret i1 %3 } However, the elements of <2 x i1> are not byte-addressible. The result of this is that the getelementptr expands to '%base + %idx * (1 / 8)' which simplifies to '%base + %idx * 0', and then simply '%base' causing all values of %idx to extract element zero. This commit fixes this by promoting the vector elements of <8-bits to i8 before splitting the vector. This fixes a number of test failures in pocl. Reviewers: pekka.jaaskelainen Subscribers: pekka.jaaskelainen, llvm-commits Differential Revision: http://reviews.llvm.org/D12591 llvm-svn: 247128
* Fix a typo I spotted when hacking on SROA. Somewhat alarming thatChandler Carruth2015-09-091-1/+1
| | | | | | nothing broke. llvm-svn: 247127
* IslNodeBuilder: Add virtual function to obtain the schedule of an ast nodeTobias Grosser2015-09-092-2/+21
| | | | | | | | | | | | Not all users of our IslNodeBuilder will attach scheduling information to the AST in the same way IslAstInfo is doing it today. By going through a virtual function when extracting the schedule of an AST node other users can provide their own functions for extract scheduling information in case they attach scheduling information in a different way to the AST nodes. No functional change for Polly itself intended. llvm-svn: 247126
* [mips][microMIPS] Implement CACHEE and PREFE instructionsZoran Jovanovic2015-09-097-8/+67
| | | | | | Differential Revision: http://reviews.llvm.org/D11628 llvm-svn: 247125
* Remove an invalid check in DW_OP_piece processing.Hafiz Abid Qadeer2015-09-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: When lldb is processing a location containing DW_OP_piece, the result is being stored in the 'pieces' variable. The location is popped from the 'stack' variable. So this check to see that 'stack' is not empty was invalid and caused the pieces after the first to not get processed. I am working on an architecture which has 16-bit and 8-bit registers. So this problem was quite easy to see. But I was able to re-produce this issue on x86 too with long long variable and compiling woth -m32. It resulted in following location list. 00000014 08048496 080484b5 (DW_OP_reg6 (esi); DW_OP_piece: 4; DW_OP_reg7 (edi); DW_OP_piece: 4) and lldb was only showing the contents of first register when I evaluated the variable as it does not process the 2nd piece due to this check. Reviewers: clayborg, aprantl Subscribers: lldb-commits Differential Revision: http://reviews.llvm.org/D12674 llvm-svn: 247124
* AMDGPU: Fix not encoding src2 of VOP3b instructionsMatt Arsenault2015-09-091-4/+4
| | | | | | | Broken by r247074. Should include an assembler test, but the assembler is currently broken for VOP3b apparently. llvm-svn: 247123
* [IRCE] Add INITIALIZE_PASS_DEPENDENCY invocations.Sanjoy Das2015-09-091-2/+9
| | | | | | IRCE was just using INITIALIZE_PASS(), which is incorrect. llvm-svn: 247122
* When lldb gets the register definitions from the response of aJason Molenda2015-09-091-4/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | qXfer:features:read:target.xml packet, or via the plugin.process.gdb-remote.target-definition-file setting, if the register definition doesn't give us eh_frame or DWARF register numbers for that register, try to get that information from the ABI plugin. The DWARF/eh_frame register numbers are defined in the ABI standardization documents - so getting this from the ABI plugin is reasonable. There's little value in having the remote stub inform us of this generic information, as long as we can all agree on the names of the registers. There's some additional information we could get from the ABI. For instance, on ABIs where function arguments are passed in registers, lldb defines alternate names like "arg1", "arg2", "arg3" for these registers so they can be referred to that way by the user. We could get this from the ABI if the remote stub doesn't provide that. That may be something worth doing in the future - but for now, I'm keeping this a little more minimal. Thinking about this, what we want/need from the remote stub at a minimum are: 1. The names of the register 2. The number that the stub will use to refer to the register with the p/P packets and in the ? response packets (T/S) where expedited register values are provided 3. The size of the register in bytes (nice to have, to remove any doubt) 4. The offset of the register in the g/G packet if we're going to use that for reading/writing registers. debugserver traditionally provides a lot more information in addition to this via the qRegisterInfo packet, and debugserver augments its response to the qXfer:features:read:target.xml query to include this information. Including: DWARF regnum, eh_frame regnum, stabs regnum, encoding (ieee754, Uint, Vector, Sint), format (hex, unsigned, pointer, vectorof*, float), registers that should be marked as invalid if this register is modified, and registers that contain this register. We might want to get all of this from the ABI - I'm not convinced that it makes sense for the remote stub to provide any of these details, as long as the ABI and remote stub can agree on register names. Anyway, start with eh_frame and DWARF coming from the ABI if they're not provided by the remote stub. We can look at doing more in the future. <rdar://problem/22566585> llvm-svn: 247121
* A change I'm open to reverting if there is disagreement:Jason Molenda2015-09-091-1/+3
| | | | | | | | | | | | | | | | | | | When lldb receives a gdb-remote protocol packet that has nonprintable characters, it will print the packet in gdb-remote logging with binary-hex encoding so we don't dump random 8-bit characters into the packet log. I'm changing this check to allow whitespace characters (newlines, linefeeds, tabs) to be printed if those are the only non-printable characters in the packet. This is primarily to get the response to the qXfer:features:read:target.xml packet to show up in the packet logs in human readable form. Right now we just get a dozen kilobytes of hex-ascii and it's hard to figure out what register number scheme is being used. llvm-svn: 247120
* [RuntimeDyld] Add support for MachO x86_64 SUBTRACTOR relocation.Lang Hames2015-09-092-1/+63
| | | | llvm-svn: 247119
* [WebAssembly] Fix lowering of calls with more than one argument.Dan Gohman2015-09-092-2/+18
| | | | llvm-svn: 247118
* Fix vld1_lane intrinsic generationSteven Wu2015-09-091-2/+1
| | | | | | | Fix a bug introduced in r246985 which causes assertion when generating vld1_lane. llvm-svn: 247117
* Teach utilsOsType about NetBSDStephane Sezer2015-09-091-0/+3
| | | | | | | | | | | | | | Summary: NetBSD is a free, fast, secure, and highly portable Unix-like Open Source operating system. Reviewers: joerg, sas Subscribers: sas, emaste, lldb-commits Differential Revision: http://reviews.llvm.org/D12615 Change by Kamil Rytarowski <n54@gmx.com> llvm-svn: 247116
* NetBSD doesn't provide struct statfs, make use of struct statvfsStephane Sezer2015-09-091-0/+22
| | | | | | | | | | | | Reviewers: joerg, sas Subscribers: labath, lldb-commits Differential Revision: http://reviews.llvm.org/D12661 Change by Kamil Rytarowski <n54@gmx.com> llvm-svn: 247115
* Prevent from a redefinition of _GLIBCXX_USE_NANOSLEEPStephane Sezer2015-09-091-0/+2
| | | | | | | | | | | | | | Summary: Build warning caught on NetBSD. Reviewers: joerg, sas Subscribers: lldb-commits Differential Revision: http://reviews.llvm.org/D12662 Change by Kamil Rytarowski <n54@gmx.com> llvm-svn: 247114
* SelectionDAG: Support Expand of f16 extloadsMatt Arsenault2015-09-095-30/+122
| | | | | | | | | | Currently this hits an assert that extload should always be supported, which assumes integer extloads. This moves a hack out of SI's argument lowering and is covered by existing tests. llvm-svn: 247113
* Data formatter candidate matches can be generated in a number of ways; ↵Enrico Granata2015-09-097-50/+83
| | | | | | | | | | language-based dynamic type discovery being one of them (for instance, this is what takes an 'id' and discovers that it truly is an __NSArrayI, so it should probably use the NSArray formatter) This used to be hardcoded in the FormatManager, but in a pluginized world that is not the right way to go So, move this step to the Language plugin such that appropriate language plugins for a type get a say about adding candidates to the formatters lookup tables llvm-svn: 247112
* Fix log message warning in SBThread.Bruce Mitchener2015-09-091-1/+1
| | | | | | | | | | | | | | | Summary: The format string was not set up correctly as it was missing the %. This resulted in a warning (correctly) that the data arguments were not all used. Reviewers: clayborg, jingham Subscribers: lldb-commits Differential Revision: http://reviews.llvm.org/D12714 llvm-svn: 247111
* [WebAssembly] Implement WebAssemblyInstrInfo::copyPhysRegDan Gohman2015-09-094-22/+64
| | | | llvm-svn: 247110
* Fix typos / grammarMatt Arsenault2015-09-092-27/+27
| | | | llvm-svn: 247109
* Revert "Bitcode: ArrayRef-ize EmitRecordWithAbbrev(), NFC"Duncan P. N. Exon Smith2015-09-091-16/+15
| | | | | | | | | | This reverts commit r247107. Turns out clang calls these functions directly, and `ArrayRef<T>` doesn't have a working implicit conversion from `SmallVector<T>`. http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-incremental_build/14247 llvm-svn: 247108
* Bitcode: ArrayRef-ize EmitRecordWithAbbrev(), NFCDuncan P. N. Exon Smith2015-09-091-15/+16
| | | | | | | | Change `EmitRecordWithAbbrev()` and friends to take an `ArrayRef<T>` instead of requiring a `SmallVectorImpl<T>`. No functionality change intended. llvm-svn: 247107
* [llvm-readobj] MachO -- dump LinkerOptions load command.Davide Italiano2015-09-095-49/+63
| | | | | | | | | | | | | | | | | | | | Example output: Linker Options { Size: 32 Count: 2 Strings [ Value: -framework Value: Cocoa ] } There were only two tests using this -- so I converted them as part of this commit rather than separately. Differential Revision: http://reviews.llvm.org/D12702 llvm-svn: 247106
* CodeGen: Add CFI unrelated cast checks to the new pointer code path.Peter Collingbourne2015-09-092-0/+24
| | | | llvm-svn: 247105
* Introduce __builtin_nontemporal_store and __builtin_nontemporal_load.Michael Zolotukhin2015-09-089-6/+188
| | | | | | | | | | | | | Summary: Currently clang provides no general way to generate nontemporal loads/stores. There are some architecture specific builtins for doing so (e.g. in x86), but there is no way to generate non-temporal store on, e.g. AArch64. This patch adds generic builtins which are expanded to a simple store with '!nontemporal' attribute in IR. Differential Revision: http://reviews.llvm.org/D12313 llvm-svn: 247104
* Revert "[Static Analyzer] BugReporter.cpp:2869: Assertion failed: ↵Devin Coughlin2015-09-083-103/+2
| | | | | | | | | | | | | | | | !RemainingNodes.empty() && "No error node found in the trimmed graph"" This is making our internal build bot fail because it results in extra warnings being emitted past what should be sink nodes. (There is actually an example of this in the updated malloc.c test in the reverted commit.) I'm working on a patch to fix the original issue by adding a new checker API to explicitly create error nodes. This API will ensure that error nodes are always tagged in order to prevent them from being reclaimed. This reverts commit r246188. llvm-svn: 247103
* [WinEH] Avoid creating MBBs for LLVM BBs that cannot contain codeReid Kleckner2015-09-086-63/+83
| | | | | | | | | | | | | | Typically these are catchpads, which hold data used to decide whether to catch the exception or continue unwinding. We also shouldn't create MBBs for catchendpads, cleanupendpads, or terminatepads, since no real code can live in them. This fixes a problem where MI passes (like the register allocator) would try to put code into catchpad blocks, which are not executed by the runtime. In the new world, blocks ending in invokes now have many possible successors. llvm-svn: 247102
* Fix regressions in dotest.py when passing filters or directories.Todd Fiala2015-09-081-0/+13
| | | | | | | | | | See https://llvm.org/bugs/show_bug.cgi?id=24708 for details. Using '-f FILTER' or unnamed arguments (directories) to dotest.py will now force no-multiprocessing mode. This stops a bombardment of test output spam when following the instructions we provide in a test session trace for rerunning the test. llvm-svn: 247101
* [msan] Unpoison dlpi_phdr in dl_iterate_phdr.Evgeniy Stepanov2015-09-083-0/+8
| | | | | | | | | | | In some cases, PHDR table is allocated with malloc() by the linker instead of being mapped from file. It needs to be unpoisoned in the dl_iterate_phdr callback then. This happens when program headers are not part of any loadable ELF segment. llvm-svn: 247100
* [CMake] Remove all uses of LLVM_NATIVE_ARCH.Alexey Samsonov2015-09-083-15/+11
| | | | | | | | | | | | | | | | Instead, assume we're going to target triple specified by COMPILER_RT_DEFAULT_TARGET_TRIPLE and build runtimes for this triple (and hope that the host compiler can target them). This will help users that use cross-compiler on their host to build Clang that would work on a different architecture. This will also come in handy if one would want to configure several compiler-rt build trees on the same host, using just-built Clang that can target many architectures. This doesn't change the behavior in the default build configuration. llvm-svn: 247099
* CodeGen: Introduce CodeGenModule::CreateMetadataIdentifierForType.Peter Collingbourne2015-09-082-0/+30
| | | | | | | | | This function can be used to create a metadata identifier for a specific type. No functionality change, but this will be used by D11857 and D12026. Differential Revision: http://reviews.llvm.org/D12038 llvm-svn: 247098
* Create a dynamic segment.Rafael Espindola2015-09-082-9/+56
| | | | | | It is still empty. I will add content next. llvm-svn: 247097
* [lld][elf2] Address review comments.Michael J. Spencer2015-09-083-8/+4
| | | | llvm-svn: 247096
* Re-apply r247080 with order of evaluation fix.Peter Collingbourne2015-09-088-144/+559
| | | | llvm-svn: 247095
* [CMake] Rename COMPILER_RT_TEST_TARGET_TRIPLE to more appropriate ↵Alexey Samsonov2015-09-083-22/+26
| | | | | | COMPILER_RT_DEFAULT_TARGET_TRIPLE. llvm-svn: 247094
* clang/test/Modules/ModuleDebugInfo.cpp: Add -triple %itanium to appease ↵NAKAMURA Takumi2015-09-081-2/+2
| | | | | | | | ms-targeted builds. I think DebugInfo tests may avoid MS stuff for now. llvm-svn: 247093
* [WinEH] Emit prologues and epilogues for funcletsReid Kleckner2015-09-0811-57/+399
| | | | | | | | | | | | | | | | | | | | | | | | Summary: 32-bit funclets have short prologues that allocate enough stack for the largest call in the whole function. The runtime saves CSRs for the funclet. It doesn't restore CSRs after we finally transfer control back to the parent funciton via a CATCHRET, but that's a separate issue. 32-bit funclets also have to adjust the incoming EBP value, which is what llvm.x86.seh.recoverframe does in the old model. 64-bit funclets need to spill CSRs as normal. For simplicity, this just spills the same set of CSRs as the parent function, rather than trying to compute different CSR sets for the parent function and each funclet. 64-bit funclets also allocate enough stack space for the largest outgoing call frame, like 32-bit. Reviewers: majnemer Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D12546 llvm-svn: 247092
* Failing test highlighting no poisoning when destructor not declared.Naomi Musgrave2015-09-082-0/+39
| | | | | | | | | | | | | | | | | | Summary: When destructor for a class is not declared, no destructor is emitted, and members are not poisoned. Test case exhibits this current bug in use-after-dtor implementation (detailed in https://github.com/google/sanitizers/issues/596). Reviewers: eugenis, kcc Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D12617 Rename test files. llvm-svn: 247091
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