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* Rename skipDebugInfo -> skipDebugIntrinsics, NFCVedant Kumar2018-06-263-3/+3
| | | | | | | | | | | | | This addresses post-commit feedback about the name 'skipDebugInfo' being misleading. This name could be interpreted as meaning 'a function that skips instructions with debug locations'. The new name, 'skipDebugIntrinsics', makes it clear that this function only skips debug info intrinsics. Thanks to Adrian Prantl for pointing this out! llvm-svn: 335667
* [analyzer] Do not run visitors until the fixpoint, run only once.George Karpenkov2018-06-2620-427/+418
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In the current implementation, we run visitors until the fixed point is reached. That is, if a visitor adds another visitor, the currently processed path is destroyed, all diagnostics is discarded, and it is regenerated again, until it's no longer modified. This pattern has a few negative implications: - This loop does not even guarantee to terminate. E.g. just imagine two visitors bouncing a diagnostics around. - Performance-wise, e.g. for sqlite3 all visitors are being re-run at least 10 times for some bugs. We have already seen a few reports where it leads to timeouts. - If we want to add more computationally intense visitors, this will become worse. - From architectural standpoint, the current layout requires copying visitors, which is conceptually wrong, and can be annoying (e.g. no unique_ptr on visitors allowed). The proposed change is a much simpler architecture: the outer loop processes nodes upwards, and whenever the visitor is added it only processes current nodes and above, thus guaranteeing termination. Differential Revision: https://reviews.llvm.org/D47856 llvm-svn: 335666
* [ORC] Allow IRTransformLayer2's transform to be modified after initialization.Lang Hames2018-06-261-3/+10
| | | | | | Also give the constructor's transform parameter a default no-op transform value. llvm-svn: 335665
* [ORC] Reset AsynchronousSymbolQuery's NotifySymbolsResolved callback on error.Lang Hames2018-06-261-3/+4
| | | | | | | | AsynchronousSymbolQuery::canStillFail checks the value of the callback to prevent sending it redundant error notifications, so we need to reset it after running it. llvm-svn: 335664
* [ORC] Move the VSOList typedef out of VSO.Lang Hames2018-06-262-8/+6
| | | | llvm-svn: 335663
* [ORC] Add a FIXME.Lang Hames2018-06-261-0/+3
| | | | llvm-svn: 335662
* [ORC] Fix a FIXME by moving MangleAndInterner to Core.h.Lang Hames2018-06-264-25/+26
| | | | llvm-svn: 335661
* Revert "[X86][AsmParser] Emit an error when RIP-relative instructions are ↵Jessica Paquette2018-06-262-20/+0
| | | | | | | | | | used in 32-bit mode" This reverts commit 4850a9aae8b38c7deadc103d634ec7397e6c323b. It caused MC/X86/x86_errors.s to fail. Will fix and recommit shortly. llvm-svn: 335660
* Reverting r335656, SWIG doesn't like "enum class".Jim Ingham2018-06-261-1/+1
| | | | llvm-svn: 335659
* [X86][AsmParser] Emit an error when RIP-relative instructions are used in ↵Jessica Paquette2018-06-262-0/+20
| | | | | | | | | | | | | 32-bit mode Right now, when we use RIP-relative instructions in 32-bit mode, we'll just assert and crash. This adds an error message which tells the user that they can't do that in 32-bit mode, so that we don't crash (and also can see the issue outside of assert builds). llvm-svn: 335658
* Fix test broken by r335644Vlad Tsyrklevich2018-06-261-2/+4
| | | | llvm-svn: 335657
* Amend "Change AddressClass type from 'enum' to 'enum class'".Tatyana Krasnukha2018-06-261-1/+1
| | | | | | r335599 changes usages of AddressClass, but doesn't change the type itself. llvm-svn: 335656
* [AST] Fix typo in LazyOffsetPtr::get docs (NFC)Brian Gesiak2018-06-261-1/+1
| | | | llvm-svn: 335655
* [AMDGPU] Add llvm.amdgcn.fmad.ftz intrinsicStanislav Mekhanoshin2018-06-263-0/+123
| | | | | | | | This intrinsic selects v_mad_f32 regardless of fp32 denorm support. Differential Revision: https://reviews.llvm.org/D48573 llvm-svn: 335654
* [mips] Use more conservative default CPUs for MIPS on FreeBSD.John Baldwin2018-06-263-12/+33
| | | | | | | | | | | | FreeBSD defaults to mips3 for all MIPS ABIs with GCC as that is the minimum MIPS architecture FreeBSD supports. Use mips3 for MIPS64 and mips2 for MIPS32 to match. Reviewed By: atanasyan Differential Revision: https://reviews.llvm.org/D48499 llvm-svn: 335653
* [DAGCombiner] use isBitwiseNot to simplify code; NFCSanjay Patel2018-06-261-8/+3
| | | | llvm-svn: 335652
* [PPC64] Thread-local storage general-dynamic to initial-exec relaxation.Sean Fertile2018-06-264-0/+166
| | | | | | | | | | | | | | | | | | Patch adds support for relaxing the general-dynamic tls sequence to initial-exec. the relaxation performs the following transformation: addis r3, r2, x@got@tlsgd@ha --> addis r3, r2, x@got@tprel@ha addi r3, r3, x@got@tlsgd@l --> ld r3, x@got@tprel@l(r3) bl __tls_get_addr(x@tlsgd) --> nop nop --> add r3, r3, r13 and instead of emitting a DTPMOD64/DTPREL64 pair for x, we emit a single R_PPC64_TPREL64. Differential Revision: https://reviews.llvm.org/D48090 llvm-svn: 335651
* AMDGPU: Add pass to lower kernel arguments to loadsMatt Arsenault2018-06-26130-1539/+3111
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This replaces most argument uses with loads, but for now not all. The code in SelectionDAG for calling convention lowering is actively harmful for amdgpu_kernel. It attempts to split the argument types into register legal types, which results in low quality code for arbitary types. Since all kernel arguments are passed in memory, we just want the raw types. I've tried a couple of methods of mitigating this in SelectionDAG, but it's easier to just bypass this problem alltogether. It's possible to hack around the problem in the initial lowering, but the real problem is the DAG then expects to be able to use CopyToReg/CopyFromReg for uses of the arguments outside the block. Exposing the argument loads in the IR also has the advantage that the LoadStoreVectorizer can merge them. I'm not sure the best approach to dealing with the IR argument list is. The patch as-is just leaves the IR arguments in place, so all the existing code will still compute the same kernarg size and pointlessly lowers the arguments. Arguably the frontend should emit kernels with an empty argument list in the first place. Alternatively a dummy array could be inserted as a single argument just to reserve space. This does have some disadvantages. Local pointer kernel arguments can no longer have AssertZext placed on them as the equivalent !range metadata is not valid on pointer typed loads. This is mostly bad for SI which needs to know about the known bits in order to use the DS instruction offset, so in this case this is not done. More importantly, this skips noalias arguments since this pass does not yet convert this to the equivalent !alias.scope and !noalias metadata. Producing this metadata correctly seems to be tricky, although this logically is the same as inlining into a function which doesn't exist. Additionally, exposing these loads to the vectorizer may result in degraded aliasing information if a pointer load is merged with another argument load. I'm also not entirely sure this is preserving the current clover ABI, although I would greatly prefer if it would stop widening arguments and match the HSA ABI. As-is I think it is extending < 4-byte arguments to 4-bytes but doesn't align them to 4-bytes. llvm-svn: 335650
* ConstantFold: Don't fold global address vs. null for addrspace != 0Matt Arsenault2018-06-263-5/+19
| | | | | | | | | | | Not sure why this logic seems to be repeated in 2 different places, one called by the other. On AMDGPU addrspace(3) globals start allocating at 0, so these checks will be incorrect (not that real code actually tries to compare these addresses) llvm-svn: 335649
* Use a variable to appease a no-asserts bot, NFCVedant Kumar2018-06-261-0/+1
| | | | | | | Failure URL: http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/22836 llvm-svn: 335648
* [Debugify] Don't treat missing dbg.values as an error (PR37942)Vedant Kumar2018-06-262-3/+2
| | | | | | | | | When checking the debug info in a module, don't treat a missing dbg.value as an error. The dbg.value may simply have been DCE'd, in which case the debugger has enough information to display the variable as <optimized out>. llvm-svn: 335647
* [ConstantRange] Add support of mul in makeGuaranteedNoWrapRegion.Tim Shen2018-06-262-0/+157
| | | | | | | | | | | | Summary: This is trying to add support for r334428. Reviewers: sanjoy Subscribers: jlebar, hiraditya, bixia, llvm-commits Differential Revision: https://reviews.llvm.org/D48399 llvm-svn: 335646
* LoopUnroll: Allow analyzing intrinsic call costsMatt Arsenault2018-06-262-2/+84
| | | | | | | | | | | I'm not sure why the code here is skipping calls since TTI does try to do something for general calls, but it at least should allow intrinsics. Skip intrinsics that should not be omitted as calls, which is by far the most common case on AMDGPU. llvm-svn: 335645
* CFI: Print DSO names for failed cross-DSO icallsVlad Tsyrklevich2018-06-263-8/+74
| | | | | | | | | | | | Reviewers: pcc Reviewed By: pcc Subscribers: kubamracek, delcypher, llvm-commits, kcc, #sanitizers Differential Revision: https://reviews.llvm.org/D48583 llvm-svn: 335644
* [Local] Add a convenient insertReplacementDbgValues overload, NFCVedant Kumar2018-06-263-8/+19
| | | | | | | Add an overload for the common case where the replacement dbg.values have the same DIExpressions as the originals. llvm-svn: 335643
* [Local] Sink salvageDI's early exit into helper functions, NFCVedant Kumar2018-06-261-5/+12
| | | | | | | | salvageDebugInfo() performs a check that allows it to exit early without doing a DenseMap lookup. It's a bit neater and marginally more useful to sink this early exit into the findDbg{Addr,Users,Values} helpers. llvm-svn: 335642
* [Hexagon] Add a "generic" cpuBrendon Cahoon2018-06-265-1/+14
| | | | | | | | | | Add the generic processor for Hexagon so that it can be used with 3rd party programs that create a back-end with the "generic" CPU. This patch also enables the JIT for Hexagon. Differential Revision: https://reviews.llvm.org/D48571 llvm-svn: 335641
* [libFuzzer] Do not turn unittest warnings into errors.Matt Morehouse2018-06-261-1/+0
| | | | | | | | Some warnings originating from googletest were causing bots to fail while bulding unit tests. The sanitizers address this issue by not using -Werror. We adopt this approach for libFuzzer. llvm-svn: 335640
* [libFuzzer] Mark several tests UNSUPPORTED for aarch64.Matt Morehouse2018-06-266-3/+7
| | | | | | | Now that check-fuzzer runs as part of check-all, some aarch64 bots had tests failing. llvm-svn: 335639
* [Sema] Fix infinite typo correction loop.Volodymyr Sapsai2018-06-262-4/+13
| | | | | | | | | | | | | | | | | | | | | | | NumTypos guard value ~0U doesn't prevent from creating new delayed typos. When you create new delayed typos during typo correction, value ~0U wraps around to 0. When NumTypos is 0 we can miss some typos and treat an expression as it can be typo-corrected. But if the expression is still invalid after correction, we can get stuck in infinite loop trying to correct it. Fix by not using value ~0U so that NumTypos correctly reflects the number of typos. rdar://problem/38642201 Reviewers: arphaman, majnemer, rsmith Reviewed By: rsmith Subscribers: rsmith, nicholas, cfe-commits Differential Revision: https://reviews.llvm.org/D47341 llvm-svn: 335638
* [DAGCombiner] Don't accept -1 sdiv divisors in sdiv-by-pow2 vector expansion ↵Simon Pilgrim2018-06-262-192/+187
| | | | | | | | (PR37119) Temporary fix until I've managed to get D45806 updated - both +1 and -1 special cases need to be properly supported. llvm-svn: 335637
* Compile CodeGenModule.cpp with /bigobj.Peter Collingbourne2018-06-261-0/+4
| | | | | | | Apparently we're now hitting an object file section limit on this file with expensive checks enabled. llvm-svn: 335636
* Move `REQUIRES:` line to the topFangrui Song2018-06-2611-14/+12
| | | | llvm-svn: 335635
* [HIP] Remove hip/hc.amdgcn.bc from HIP ToolchainsAaron Enye Shi2018-06-261-2/+2
| | | | | | | | | | | | | | | Summary: The hc.amdgcn.bc and hip.amdgcn.bc are removed in VDI build and no longer needed. Reviewers: yaxunl Reviewed By: yaxunl Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D48455 llvm-svn: 335634
* [InstSimplify] fold shifts by sext boolSanjay Patel2018-06-262-19/+11
| | | | | | https://rise4fun.com/Alive/c3Y llvm-svn: 335633
* [OPENMP, NVPTX] Reduce the number of the globalized variables.Alexey Bataev2018-06-262-9/+94
| | | | | | | | | Patch tries to make better analysis of the variables that should be globalized. From now, instead of all parallel directives it will check only distribute parallel .. directives and check only for firstprivte/lastprivate variables if they must be globalized. llvm-svn: 335632
* [InstSimplify] add tests for shifts by sext bool; NFCSanjay Patel2018-06-261-0/+66
| | | | llvm-svn: 335631
* [Test] Initial test commit accessAaron Enye Shi2018-06-261-1/+1
| | | | llvm-svn: 335630
* [X86][SSE] Add another sdiv by (nonuniform) minus one test (PR37119)Simon Pilgrim2018-06-261-2/+204
| | | | | | Include a test that divides by -1 but not by 1 (another special case) llvm-svn: 335629
* Revert "[CMake][Darwin] Match cxx-headers -> cxx_headers libcxx target rename."Francis Visoiu Mistrih2018-06-261-1/+1
| | | | | | | | | This reverts commit r334550. Try to fix the stage2 build failing on Green Dragon for a while. http://green.lab.llvm.org/green/job/clang-stage2-Rthinlto/11124/console llvm-svn: 335628
* [ELF] Assign RF_EXEC rank even if --no-rosegment or SECTIONS command is usedFangrui Song2018-06-2633-147/+148
| | | | | | | | | | | | | | | | | Summary: Currently when --no-rosegment is specified or a linker script with SECTIONS command is used, .rodata (A) .text (AX) are assigned the same rank and .rodata may be placed after .text . This increases the gap between .text and .bss and can cause pc-relative relocation overflow (e.g. gcc crtbegin.o crtbegin.S have R_X86_64_PC32 relocation from .text to .bss). This patch makes SingleRoRx affect only segment layout, not section layout. As a consequence, .rodata will be placed before .text regardless of SingleRoRx. Reviewers: espindola, ruiu, grimar, echristo, javed.absar Subscribers: emaste, arichardson, llvm-commits Differential Revision: https://reviews.llvm.org/D48405 llvm-svn: 335627
* Fix -Wdocumentation warning. NFCI.Simon Pilgrim2018-06-261-2/+1
| | | | llvm-svn: 335626
* [ELF] Move `# REQUIRES:` line to the topFangrui Song2018-06-26104-178/+104
| | | | llvm-svn: 335625
* [clangd] Simplify matches in FindSymbols testsMarc-Andre Laperle2018-06-261-57/+45
| | | | | | | | | | | | | | | | | Summary: Instead of checking symbol name and container (scope) separately, check the qualified name instead. This is much shorter and similar to how it is done in the SymbolCollector tests. Signed-off-by: Marc-Andre Laperle <marc-andre.laperle@ericsson.com> Reviewers: simark Subscribers: ilya-biryukov, ioeric, MaskRay, jkorous, cfe-commits Differential Revision: https://reviews.llvm.org/D47847 llvm-svn: 335624
* [InstCombine] simplify code for urem fold; NFCISanjay Patel2018-06-261-5/+2
| | | | llvm-svn: 335623
* [InstCombine] fold urem with sext bool divisorSanjay Patel2018-06-262-6/+17
| | | | | | | | | | | | | | | | | | | | | | Similar to other patches in this series: https://reviews.llvm.org/rL335512 https://reviews.llvm.org/rL335527 https://reviews.llvm.org/rL335597 https://reviews.llvm.org/rL335616 ...this is filling a gap in analysis that is exposed by an unrelated select-of-constants transform. I didn't see a way to unify the sext cases because each div/rem opcode results in a different fold. Note that in this case, the backend might want to convert the select into math: Name: sext urem %e = sext i1 %x to i32 %r = urem i32 %y, %e => %c = icmp eq i32 %y, -1 %z = zext i1 %c to i32 %r = add i32 %z, %y llvm-svn: 335622
* [SLPVectorizer] Recognise non uniform power of 2 constantsSimon Pilgrim2018-06-262-44/+64
| | | | | | | | | | Since D46637 we are better at handling uniform/non-uniform constant Pow2 detection; this patch tweaks the SLP argument handling to support them. As SLP works with arrays of values I don't think we can easily use the pattern match helpers here. Differential Revision: https://reviews.llvm.org/D48214 llvm-svn: 335621
* [Driver] Do not add -lpthread & -lrt with -static-libsan on AndroidKostya Kortchinsky2018-06-262-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: I am not sure anyone has tried to compile an application with sanitizers on Android with `-static-libsan`, and a recent NDK, but it fails with: ``` .../i686-linux-android/bin/ld.gold: error: cannot find -lpthread .../i686-linux-android/bin/ld.gold: error: cannot find -lrt ``` My understanding is that both are included in Bionic and as such are not needed, and actually error out. So remove the addition of those two in `linkSanitizerRuntimeDeps` when dealing with Android, and update the tests. I am unfamiliar with the evolution of the NDK and I am not sure if this has always been the case or if this is somewhat of a recent evolution. I'll let Android people chime in. Reviewers: eugenis, pirama, srhines Reviewed By: eugenis, srhines Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D48570 llvm-svn: 335620
* [InstCombine] add tests for urem with sext bool divisor; NFCSanjay Patel2018-06-261-0/+22
| | | | llvm-svn: 335619
* [ThinLTO] Add testing of summary index parsing to a couple CFI testsTeresa Johnson2018-06-262-0/+4
| | | | | | | | | | | | | | | Summary: Changes to some clang side tests to go with the summary parsing patch. Depends on D47905. Reviewers: pcc, dexonsmith, mehdi_amini Subscribers: inglorion, eraman, cfe-commits, steven_wu Differential Revision: https://reviews.llvm.org/D47906 llvm-svn: 335618
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