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* Remove valueCoversEntireFragment asserts in ConvertDebugDeclareToDebugValueBjorn Pettersson2018-06-191-6/+0
| | | | | | | | | | | | | | This is a fixup for r334830 causing problems in polly-aosp buildbot. Focus in r334830 was to fix a problem seen with ConvertDebugDeclareToDebugValue involving store instructions. It also added some asserts to find out of similar problems existed for the ConvertDebugDeclareToDebugValue functions involving load and phi instructions. One of those asserts seems to blow in the polly-aosp buildbot, so I'll revert the asserts while debugging. llvm-svn: 335031
* [analyzer] Made a buildbot happy.Kristof Umann2018-06-191-7/+9
| | | | | | | Since `isPrimitiveType` was only used in an assert, a builbot with `-Werror` and no asserts enabled failed to build it as it was unused. llvm-svn: 335030
* Move ScopInfo to isl++Tobias Grosser2018-06-191-2/+1
| | | | llvm-svn: 335029
* Add a factory method to ConstantDataArray that allows to pass in the data as ↵Adrian Kuegel2018-06-191-3/+13
| | | | | | | | | | | StringRef This simplifies the case if we already have access to the raw data that we need to store in a ConstantDataArray. The new factor method can also be reused for implementing the factory method that gets the data as ArrayRef. Differential Revision: https://reviews.llvm.org/D47706 llvm-svn: 335028
* [LoopInterchange] Move PHI handling to adjustLoopBranches.Florian Hahn2018-06-191-30/+40
| | | | | | | | | | | | | | | | | | | | | This patch moves the logic to handle reduction PHI nodes to the end of adjustLoopBranches. Reduction PHI nodes in the outer loop header can be moved to the inner loop header and reduction PHI nodes from the inner loop header can be moved to the outer loop header. In the latter situation, we have to deal with 1 kind of PHI nodes: PHI nodes that are part of inner loop-only reductions. We can replace the PHI node with the value coming from outside the inner loop. Reviewers: mcrosier, efriedma, karthikthecool Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D46198 llvm-svn: 335027
* Test commit.Mikhail Dvoretckii2018-06-191-1/+1
| | | | llvm-svn: 335026
* [XRay] rm GLOB || true -> rm -fFangrui Song2018-06-1912-21/+21
| | | | | | | | | | | | Summary: `rm -f` does not write diagnostic message when there is no file argument. Reviewers: dberris Subscribers: delcypher, llvm-commits, #sanitizers Differential Revision: https://reviews.llvm.org/D48311 llvm-svn: 335025
* If the arch is P9, we will select the DFLOADf32/DFLOADf64 pseudo instruction ↵QingShan Zhang2018-06-194-13/+95
| | | | | | | | | | | when we are loading a floating, and expand it post RA basing on the register pressure. However, we miss to do the add-imm peephole for these pseudo instruction. Differential Revision: https://reviews.llvm.org/D47568 Reviewed By: Nemanjai llvm-svn: 335024
* [RISCV] Add tests for overflow intrinsicsRoger Ferrer Ibanez2018-06-191-0/+84
| | | | | | | This is using the existing codegen so we can see the change once we custom lower ISD::{U,S}{ADD,SUB}O nodes. llvm-svn: 335023
* Revert r335019 "Update NRVO logic to support early return (Attempt 2)"Taiju Tsuiki2018-06-1912-307/+84
| | | | llvm-svn: 335022
* [Sema] Produce diagnostics for attribute 'trivial_abi' that appearsAkira Hatanaka2018-06-193-10/+9
| | | | | | | | | | | | after the closing brace of a class declaration. Merge the two call sites of checkIllFormedTrivialABIStruct and sink it into CheckCompletedCXXClass so that it is called after the attribute has been attached to the CXXRecordDecl. rdar://problem/40873297 llvm-svn: 335021
* [SimplifyIndVars] Eliminate redundant truncsMax Kazantsev2018-06-194-3/+588
| | | | | | | | | | | | | | | | | | | | | | | This patch adds logic to deal with the following constructions: %iv = phi i64 ... %trunc = trunc i64 %iv to i32 %cmp = icmp <pred> i32 %trunc, %invariant Replacing it with %iv = phi i64 ... %cmp = icmp <pred> i64 %iv, sext/zext(%invariant) In case if it is legal. Specifically, if `%iv` has signed comparison users, it is required that `sext(trunc(%iv)) == %iv`, and if it has unsigned comparison uses then we require `zext(trunc(%iv)) == %iv`. The current implementation bails if `%trunc` has other uses than `icmp`, but in theory we can handle more cases here (e.g. if the user of trunc is bitcast). Differential Revision: https://reviews.llvm.org/D47928 Reviewed By: reames llvm-svn: 335020
* Update NRVO logic to support early return (Attempt 2)Taiju Tsuiki2018-06-1912-84/+307
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is the second attempt of r333500 (Update NRVO logic to support early return). The previous one was reverted for a miscompilation for an incorrect NRVO set up on templates such as: ``` struct Foo {}; template <typename T> T bar() { T t; if (false) return T(); return t; } ``` Where, `t` is marked as non-NRVO variable before its instantiation. However, while its instantiation, it's left an NRVO candidate, turned into an NRVO variable later. Reviewers: rsmith Reviewed By: rsmith Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D47586 llvm-svn: 335019
* [X86] Add the ability to force an EVEX2VEX mapping table entry from the .td ↵Craig Topper2018-06-193-136/+158
| | | | | | | | | | | | | | files. Remove remaining manual table entries from the tablegen emitter. This adds an EVEX2VEXOverride string to the X86 instruction class in X86InstrFormats.td. If this field is set it will add manual entry in the EVEX->VEX tables that doesn't check the encoding information. Then use this mechanism to map VMOVDU/A8/16, 128-bit VALIGN, and VPSHUFF/I instructions to VEX instructions. Finally, remove the manual table from the emitter. This has the bonus of fully sorting the autogenerated EVEX->VEX tables by their EVEX instruction enum value. We may be able to use this to do a binary search for the conversion and get rid of the need to create a DenseMap. llvm-svn: 335018
* [X86] Add a new VEX_WPrefix encoding to tag EVEX instruction that have ↵Craig Topper2018-06-195-87/+54
| | | | | | | | | | | | | | VEX.W==1, but can be converted to their VEX equivalent that uses VEX.W==0. EVEX makes heavy use of the VEX.W bit to indicate 64-bit element vs 32-bit elements. Many of the VEX instructions were split into 2 versions with different masking granularity. The EVEX->VEX table generate can collapse the two versions if the VEX version uses is tagged as VEX_WIG. But if the VEX version is instead marked VEX.W==0 we can't combine them because we don't know if there is also a VEX version with VEX.W==1. This patch adds a new VEX_W1X tag that indicates the EVEX instruction encodes with VEX.W==1, but is safe to convert to a VEX instruction with VEX.W==0. This allows us to remove a bunch of manual EVEX->VEX table entries. We may want to look into splitting up the VEX_WPrefix field which would simplify the disassembler. llvm-svn: 335017
* Revert "[SCEV] Add nuw/nsw to mul ops in StrengthenNoWrapFlags"Sanjoy Das2018-06-1916-55/+30
| | | | | | | | | | | | | | This reverts r334428. It incorrectly marks some multiplications as nuw. Tim Shen is working on a proper fix. Original commit message: [SCEV] Add nuw/nsw to mul ops in StrengthenNoWrapFlags where safe. Summary: Previously we would add them for adds, but not multiplies. llvm-svn: 335016
* [X86] Simplify the TSFlags checking code in EvexToVexInstPass. NFCICraig Topper2018-06-191-16/+6
| | | | | | The code was previously checking the L2 and L flag on 3 separate lines, treating the combination as an encoding. Instead its better to think of the L2 bit as being something that can't be done with VEX and early returning. Then we just need to check the L bit. llvm-svn: 335015
* Fix up Info.plist when building LLDB.framework with CMakeAlex Langford2018-06-193-1/+9
| | | | | | | | | | | | Summary: We weren't using the Info.plist template in resources previously. When using that template, some of the key's values weren't being populated because some variables were not being defined. In one case, CMake didn't like the substring expansion syntax of CFBundleIdentifier so I got rid of that. Differential Revision: https://reviews.llvm.org/D47792 llvm-svn: 335014
* Fix bots after r334981Francis Visoiu Mistrih2018-06-191-19/+19
| | | | llvm-svn: 335013
* [WebAssembly] Remove an extra ';' at the end of a namespaceHeejin Ahn2018-06-191-1/+1
| | | | llvm-svn: 335008
* [asan] Avoid deadlock when initializing the symbolizer CHECK failsReid Kleckner2018-06-191-2/+8
| | | | llvm-svn: 335007
* [WebAssembly] Add more utility functionsHeejin Ahn2018-06-194-17/+192
| | | | | | | | | | | | | | | | Summary: Added more utility functions that will be used in EH-related passes Also changed `LoopBottom` function to `getBottom` and uses templates to be able to handle other classes as well, which will be used in CFGSort later. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D48262 llvm-svn: 335006
* [WebAssembly] Add WasmEHFuncInfo for unwind destination informationHeejin Ahn2018-06-195-19/+177
| | | | | | | | | | | | | | | Summary: Add WasmEHFuncInfo and routines to calculate and fill in this struct to keep track of unwind destination information. This will be used in other EH related passes. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, chrib, llvm-commits Differential Revision: https://reviews.llvm.org/D48263 llvm-svn: 335005
* [ARM] Thumb2 constant cmp testcases.Eli Friedman2018-06-191-0/+237
| | | | | | | | Shows some missed optimizations for the -7929856 and -2166 testcases. -7929856 is due to a bug in ARMTargetLowering::getARMCmp, I think; the -2166 case is a missing pattern. llvm-svn: 335004
* [ARM] Testcase for Thumb1 cmp with constants.Eli Friedman2018-06-191-0/+110
| | | | | | | | | | Even if a comparison isn't legal, we should try to prefer constants which can be materialized with a two-instruction sequence. (Thinking about it a bit more, there might be some more clever sequence we could generate for certain comparisons invoving powers of two, but I'm not sure exactly what that would look like.) llvm-svn: 335003
* [ARM] Add Thumb1 coverage for cmn testcases.Eli Friedman2018-06-191-6/+45
| | | | | | | There's a missed optimization for immediates: we can save two instructions by using adds instead of movs+mvns+cmp. llvm-svn: 335002
* [ARM] Testcase for missed optimization for masking.Eli Friedman2018-06-191-12/+46
| | | | | | | When the result of masking is truncated to i16, we should try to use "bic" instead of "and". llvm-svn: 335001
* [ARM] Testcase for missed optimization with i16 compare.Eli Friedman2018-06-191-0/+21
| | | | | | | The result looks weird because the DAG actually has an explicit shift; I haven't figured out why, exactly. llvm-svn: 335000
* [WebAssembly] Fixed disassembler unit test failure.Derek Schuff2018-06-191-3/+3
| | | | | | | | | | Summary: A recent commit forgot to update the unit tests. Differential Revision: https://reviews.llvm.org/D48304 Patch by Wouter Van Oortmerssen llvm-svn: 334999
* [WebAssembly] Make rethrow instruction take a target BB argumentHeejin Ahn2018-06-181-2/+5
| | | | | | | | | | | | | | | | | | | | | Summary: This patch changes the rethrow instruction to take a BB argument in LLVM backend, like `br` and `br_if`s. This BB is a target catch BB the rethrow instruction unwinds to. This BB argument will be converted to an relative depth immediate at the end of CFGStackify pass, as in the same way of branches. RETHROW_TO_CALLER is a codegen-only instruction that should be used when a rethrow instruction does not have an unwind destination BB, i.e., it should rethrow to its caller function. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D48260 llvm-svn: 334998
* [VPlan] Add Analysis and Core to LLVM_LINK_COMPONENTSHeejin Ahn2018-06-181-0/+2
| | | | | | | | | | | | Summary: Without these, build with `-DSHARED_LIB=ON` fails. Reviewers: dschuff Subscribers: mgorny, bollu, tschuett, rkruppe, rogfer01, llvm-commits Differential Revision: https://reviews.llvm.org/D48300 llvm-svn: 334997
* Utilize new SDNode flag functionality to expand current support for faddMichael Berg2018-06-186-51/+50
| | | | | | | | | | | | | | Summary: This patch originated from D46562 and is a proper subset, with some issues addressed. Reviewers: spatel, hfinkel, wristow, arsenm, javed.absar Reviewed By: spatel Subscribers: wdng, nhaehnle Differential Revision: https://reviews.llvm.org/D47909 llvm-svn: 334996
* Some NFC changes to how we scan of kexts & kernels in memory in theJason Molenda2018-06-182-32/+58
| | | | | | | | | | | | | | | | | | DynamicLoaderDarwinKernel plugin. Created a new function ReadMachHeader and instead of reading through the target cached memory reader, start by reading only a mach header sized chunk of memory, then check it for a valid mach-o magic # and use the size of the load commands to pre-fetch the entire load commands of the kext which is the only thing we're going to read, instead of letting the generic mach-o parser read it in 512 byte chunks. Functionally this is doing exactly the same thing as before, but by cutting down on the # of packets going back and forth, even on a local connection it's close to a quarter faster than it was before. <rdar://problem/38570146> llvm-svn: 334995
* [X86] Remove ReadAfterLd from avx512_shift_rmbi multiclass.Craig Topper2018-06-181-1/+1
| | | | | | The instructions that use this class don't have another source register. So I think this was just marking one of the address operands as ReadAfterLd? llvm-svn: 334994
* Revert "Simplify blockaddress usage before giving up in ↵Xin Tong2018-06-183-37/+5
| | | | | | | | | | | MergeBlockIntoPredecessor" This reverts commit f976cf4cca0794267f28b54e468007fd476d37d9. I am reverting this because it causes break in a few bots and its going to take me sometime to look at this. llvm-svn: 334993
* Simplify blockaddress usage before giving up in MergeBlockIntoPredecessorXin Tong2018-06-183-5/+37
| | | | | | | | | | | | | | | | | Summary: Simplify blockaddress usage before giving up in MergeBlockIntoPredecessor This is a missing small optimization in MergeBlockIntoPredecessor. This helps with one simplifycfg test which expects this case to be handled. Reviewers: davide, spatel, brzycki, asbirlea Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D48284 llvm-svn: 334992
* [ELF] Uniquify --wrap list.Fangrui Song2018-06-182-2/+7
| | | | | | | | | | | | Summary: For --wrap foo --wrap foo, bfd/gold wrap the symbol only once but LLD would rotate it twice. Reviewers: ruiu, espindola Subscribers: emaste, arichardson, mgrang, llvm-commits Differential Revision: https://reviews.llvm.org/D48298 llvm-svn: 334991
* Tidy comment language and explanation.Eric Christopher2018-06-181-5/+5
| | | | llvm-svn: 334990
* Pull non-lazy stub table emission into a separate function alongsideEric Christopher2018-06-181-41/+47
| | | | | | | the individual stub creation to increase readability a bit in the non-object file format specific function. llvm-svn: 334989
* Add return statements to make it clear that all of these are mutually ↵Eric Christopher2018-06-181-0/+4
| | | | | | | | exclusive conditions. else if would have worked just as well, but this keeps the original readability a bit more clear. llvm-svn: 334988
* Tests for dag combine select (binop) -> select. NFC.Stanislav Mekhanoshin2018-06-182-58/+573
| | | | | | Tests will be updated with https://reviews.llvm.org/D48223 llvm-svn: 334987
* [llvm-mca] Cleanup the header syntax line. Fix a comment. NFC.Matt Davis2018-06-181-3/+2
| | | | | | This patch removes a few dashes from the header comment to make room for the syntax line. llvm-svn: 334986
* [WebAssembly] Modified tablegen defs to have 2 parallel instuction sets.Wouter van Oortmerssen2018-06-1812-425/+640
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: One for register based, much like the existing definitions, and one for stack based (suffix _S). This allows us to use registers in most of LLVM (which works better), and stack based in MC (which results in a simpler and more readable assembler / disassembler). Tried to keep this change as small as possible while passing tests, follow-up commit will: - Add reg->stack conversion in MI. - Fix asm/disasm in MC to be stack based. - Fix emitter to be stack based. tests passing: llvm-lit -v `find test -name WebAssembly` test/CodeGen/WebAssembly test/MC/WebAssembly test/MC/Disassembler/WebAssembly test/DebugInfo/WebAssembly test/CodeGen/MIR/WebAssembly test/tools/llvm-objdump/WebAssembly Reviewers: dschuff, sbc100, jgravelle-google, sunfish Subscribers: aheejin, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D48183 llvm-svn: 334985
* refactor of visitFADD for AllowNewConst casesMichael Berg2018-06-181-17/+20
| | | | | | | | | | | | | | Summary: Refactoring for all constant cases which require AllowNewConst and some staging for future fmf usage. Reviewers: spatel, hfinkel, wristow Reviewed By: spatel Subscribers: nhaehnle Differential Revision: https://reviews.llvm.org/D48289 llvm-svn: 334984
* [AArch64][SVE] Asm: Fix predicate pattern diagnostics.Sander de Smalen2018-06-1827-88/+90
| | | | | | | | | | | | | | | This patch uses the DiagnosticPredicate for SVE predicate patterns to improve their diagnostics, now giving a 'invalid operand' diagnostic if the type is not an immediate or one of the expected pattern labels. Reviewers: samparker, SjoerdMeijer, javed.absar, fhahn Reviewed By: fhahn Differential Revision: https://reviews.llvm.org/D48220 llvm-svn: 334983
* IRgen: Mark aliases of ctors and dtors as unnamed_addr.Peter Collingbourne2018-06-1811-33/+29
| | | | | | | | | This is not only semantically correct but ensures that they will not be marked as address-significant once D48155 lands. Differential Revision: https://reviews.llvm.org/D48206 llvm-svn: 334982
* Fixing os_version_check.c to be actual C sourceChris Bieneman2018-06-181-27/+50
| | | | | | | | | The initial implementaiton was using the C++ typeof keyword. This causes the compiler to spew warnings unnecissarilly. This patch removes the uses of typeof and replaces them with explicit typedefs of the function types. llvm-svn: 334981
* [AArch64][SVE] Asm: Support for saturating INC/DEC (32bit scalar) instructions.Sander de Smalen2018-06-1838-54/+1068
| | | | | | | | | | | | | | | | | | | | | | | The variants added by this patch are: - SQINC signed increment, e.g. sqinc x0, w0, all, mul #4 - SQDEC signed decrement, e.g. sqdec x0, w0, all, mul #4 - UQINC unsigned increment, e.g. uqinc w0, all, mul #4 - UQDEC unsigned decrement, e.g. uqdec w0, all, mul #4 This patch includes asmparser changes to parse a GPR64 as a GPR32 in order to satisfy the constraint check: x0 == GPR64(w0) in: sqinc x0, w0, all, mul #4 ^___^ (must match) Reviewers: rengolin, fhahn, SjoerdMeijer, samparker, javed.absar Reviewed By: fhahn Differential Revision: https://reviews.llvm.org/D47716 llvm-svn: 334980
* [WebAssembly] Cleaned up register accessors in WebAssemblyMachineFunctionInfo.hWouter van Oortmerssen2018-06-181-10/+14
| | | | | | | | Tested: llvm-lit -v `find test -name WebAssembly` (This is a commit access "test commit" :) llvm-svn: 334979
* Fixed file completion for paths that start with '~'.Raphael Isemann2018-06-181-0/+6
| | | | | | | | | | We didn't add the remaining path behind the '~' to the completion string, causing it to just complete directories inside the user home directory. This patch just adds the directory of the remaining path if there is one. Fixes rdar://problem/40147002 llvm-svn: 334978
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