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* constify TargetMachine parameter for X86TargetLowering.Eric Christopher2014-10-014-5/+5
| | | | llvm-svn: 218804
* Make the sqrt intrinsic return undef for a negative input.Sanjay Patel2014-10-012-2/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | As discussed here: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20140609/220598.html And again here: http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-September/077168.html The sqrt of a negative number when using the llvm intrinsic is undefined. We should return undef rather than 0.0 to match the definition in the LLVM IR lang ref. This change should not affect any code that isn't using "no-nans-fp-math"; ie, no-nans is a requirement for generating the llvm intrinsic in place of a sqrt function call. Unfortunately, the behavior introduced by this patch will not match current gcc, xlc, icc, and possibly other compilers. The current clang/llvm behavior of returning 0.0 doesn't either. We knowingly approve of this difference with the other compilers in an attempt to flag code that is invoking undefined behavior. A front-end warning should also try to convince the user that the program will fail: http://llvm.org/bugs/show_bug.cgi?id=21093 Differential Revision: http://reviews.llvm.org/D5527 llvm-svn: 218803
* [x86] Sort the ISA-specific RUN lines for vector-sext.ll to go fromChandler Carruth2014-10-011-155/+155
| | | | | | | oldest to newest. This makes more sense to me and is more consistent with other tests. llvm-svn: 218802
* ARM: yes it can (as of r218789)Tim Northover2014-10-011-3/+0
| | | | llvm-svn: 218801
* [x86] Rename avx-{s,z}ext.ll to vector-{s,z}ext.ll.Chandler Carruth2014-10-012-0/+0
| | | | | | | | These tests are far and away the best sext and zext tests we have for vectors. I'm going to merge the other similar tests into them and expand the ISA coverage. llvm-svn: 218800
* [x86] Cleanup and re-generate the checks for avx-zext.ll using the newChandler Carruth2014-10-011-19/+32
| | | | | | script. llvm-svn: 218799
* DIBuilder: Encapsulate DIExpression's element typeDuncan P. N. Exon Smith2014-10-011-18/+16
| | | | | | | Update for corresponding LLVM API change for `DIBuilder::createExpression()`. llvm-svn: 218798
* DIBuilder: Encapsulate DIExpression's element typeDuncan P. N. Exon Smith2014-10-013-7/+10
| | | | | | | | `DIExpression`'s elements are 64-bit integers that are stored as `ConstantInt`. The accessors already encapsulate the storage. This commit updates the `DIBuilder` API to also encapsulate that. llvm-svn: 218797
* Add MachOLinkingContext parameter to MachOFileNode constructor.Nick Kledzik2014-10-019-21/+22
| | | | | | | | | | | No functionality change. This removes a down-cast from LinkingContext to MachOLinkingContext. Also, remove const from LinkingContext::createImplicitFiles() to remove the need for another const cast. Seems reasonable for createImplicitFiles() to need to modify the context (MachOLinkingContext does). llvm-svn: 218796
* [x86] Generate the FileCheck assertions for avx-blend.ll with my newChandler Carruth2014-10-011-96/+75
| | | | | | | script to make them nice and predictable. This will ease updating them for the new vector shuffle lowering and seeing the delta if any. llvm-svn: 218795
* [x86] Clean up and generate detailed FileCheck assertions forChandler Carruth2014-10-011-123/+365
| | | | | | | | | | | | | avx-sext.ll using my new script. Also add an AVX2 mode to this test. Part of cleaning up the test suite before enabling the new vector shuffle lowering. This also highlights some of the abysmal failures of the old shuffle lowering. Check out those 'pinsrw' and 'pextrw' sequences! llvm-svn: 218794
* Annotate LLVM-IR for all parallel loopsJohannes Doerfert2014-10-015-75/+142
| | | | | | | | | | | | | | This change allows to annotate all parallel loops with loop id metadata. Furthermore, it will annotate memory instructions with llvm.mem.parallel_loop_access metadata for all surrounding parallel loops. This is especially usefull if an external paralleliser is used. This also removes the PollyLoopInfo class and comments the LoopAnnotator. A test case for multiple parallel loops is attached. llvm-svn: 218793
* [MemoryDepAnalysis] Fix compile time slowdownBruno Cardoso Lopes2014-10-011-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Problem One program takes ~3min to compile under -O2. This happens after a certain function A is inlined ~700 times in a function B, inserting thousands of new BBs. This leads to 80% of the compilation time spent in GVN::processNonLocalLoad and MemoryDependenceAnalysis::getNonLocalPointerDependency, while searching for nonlocal information for basic blocks. Usually, to avoid spending a long time to process nonlocal loads, GVN bails out if it gets more than 100 deps as a result from MD->getNonLocalPointerDependency. However this only happens *after* all nonlocal information for BBs have been computed, which is the bottleneck in this scenario. For instance, there are 8280 times where getNonLocalPointerDependency returns deps with more than 100 bbs and from those, 600 times it returns more than 1000 blocks. - Solution Bail out early during the nonlocal info computation whenever we reach a specified threshold. This patch proposes a 100 BBs threshold, it also reduces the compile time from 3min to 23s. - Testing The test-suite presented no compile nor execution time regressions. Some numbers from my machine (x86_64 darwin): - 17s under -Oz (which avoids inlining). - 1.3s under -O1. - 2m51s under -O2 ToT *** 23s under -O2 w/ Result.size() > 100 - 1m54s under -O2 w/ Result.size() > 500 With NumResultsLimit = 100, GVN yields the same outcome as in the unlimited 3min version. http://reviews.llvm.org/D5532 rdar://problem/18188041 llvm-svn: 218792
* Don't repeat function/variable name in comment. NFC.Sanjay Patel2014-10-012-99/+84
| | | | llvm-svn: 218791
* [X86 disasm tblegen backend] Clean up numPhysicalOperands assertsAdam Nemet2014-10-011-42/+35
| | | | | | | | | | | | | | No functionality change intended. This implements Elena's idea to put the new additionalOperand outside the switch to cover all cases (http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20140929/237763.html). Note only nontrivial change is in MRMSrcMemFrm. This requires an inclusive interval of [2, 4] because we have prefix-dependent *optional* immediate operand. llvm-svn: 218790
* ARM: allow copying of CPSR when all else fails.Tim Northover2014-10-014-1/+98
| | | | | | | | | | | | As with x86 and AArch64, certain situations can arise where we need to spill CPSR in the middle of a calculation. These should be avoided where possible (MRS/MSR is rather expensive), which ARM is actually better at than the other two since it tries to Glue defs to uses, but as a last ditch effort, copying is better than crashing. rdar://problem/18011155 llvm-svn: 218789
* Update CGDebugInfo to the updated API in LLVM.Adrian Prantl2014-10-017-34/+38
| | | | | | | | | | Complex address expressions are no longer part of DIVariable, but rather an extra argument to the debug intrinsics. http://reviews.llvm.org/D4919 rdar://problem/17994491 llvm-svn: 218788
* Move the complex address expression out of DIVariable and into an extraAdrian Prantl2014-10-01257-1378/+1535
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | argument of the llvm.dbg.declare/llvm.dbg.value intrinsics. Previously, DIVariable was a variable-length field that has an optional reference to a Metadata array consisting of a variable number of complex address expressions. In the case of OpPiece expressions this is wasting a lot of storage in IR, because when an aggregate type is, e.g., SROA'd into all of its n individual members, the IR will contain n copies of the DIVariable, all alike, only differing in the complex address reference at the end. By making the complex address into an extra argument of the dbg.value/dbg.declare intrinsics, all of the pieces can reference the same variable and the complex address expressions can be uniqued across the CU, too. Down the road, this will allow us to move other flags, such as "indirection" out of the DIVariable, too. The new intrinsics look like this: declare void @llvm.dbg.declare(metadata %storage, metadata %var, metadata %expr) declare void @llvm.dbg.value(metadata %storage, i64 %offset, metadata %var, metadata %expr) This patch adds a new LLVM-local tag to DIExpressions, so we can detect and pretty-print DIExpression metadata nodes. What this patch doesn't do: This patch does not touch the "Indirect" field in DIVariable; but moving that into the expression would be a natural next step. http://reviews.llvm.org/D4919 rdar://problem/17994491 Thanks to dblaikie and dexonsmith for reviewing this patch! Note: I accidentally committed a bogus older version of this patch previously. llvm-svn: 218787
* LTO: Add missing target triple from r218784Duncan P. N. Exon Smith2014-10-011-0/+2
| | | | llvm-svn: 218786
* Add fptrunc to mips fast-selReed Kotler2014-10-012-0/+45
| | | | | | | | | | | | | | | | | | Summary: Implement conversion of 64 to 32 bit floating point numbers (fptrunc) in mips fast-isel Test Plan: fptrunc.ll checked also with 4 internal mips build bot flavors mip32r1/miprs32r2 and at -O0 and -O2 Reviewers: dsanders Reviewed By: dsanders Subscribers: rfuhler Differential Revision: http://reviews.llvm.org/D5553 llvm-svn: 218785
* LTO: Ignore disabled diagnostic remarksDuncan P. N. Exon Smith2014-10-017-14/+91
| | | | | | | | | | | | | | | | | | | | | | | r206400 and r209442 added remarks that are disabled by default. However, if a diagnostic handler is registered, the remarks are sent unfiltered to the handler. This is the right behaviour for clang, since it has its own filters. However, the diagnostic handler exposed in the LTO API receives only the severity and message. It doesn't have the information to filter by pass name. For LTO, disabled remarks should be filtered by the producer. I've changed `LLVMContext::setDiagnosticHandler()` to take a `bool` argument indicating whether to respect the built-in filters. This defaults to `false`, so other consumers don't have a behaviour change, but `LTOCodeGenerator::setDiagnosticHandler()` sets it to `true`. To make this behaviour testable, I added a `-use-diagnostic-handler` command-line option to `llvm-lto`. This fixes PR21108. llvm-svn: 218784
* Add an immovable type to test Optional<T>::emplace more rigorously after ↵David Blaikie2014-10-011-5/+26
| | | | | | r218732. llvm-svn: 218783
* Revert r218778 while investigating buldbot breakage.Adrian Prantl2014-10-01257-1530/+1378
| | | | | | "Move the complex address expression out of DIVariable and into an extra" llvm-svn: 218782
* Reverting r218777 while investigating buildbot breakage.Adrian Prantl2014-10-017-38/+34
| | | | | | "Update CGDebugInfo to the updated API in LLVM." llvm-svn: 218781
* c++ error recovery. Build a valid AST when tryingFariborz Jahanian2014-10-011-1/+3
| | | | | | | | | to recover from parse error parsing the default argument. Patch prevents crash after spewing 100s of errors caused by someone who forgot to compile in c++11 mode. So no test. rdar://18508589 llvm-svn: 218780
* Do not use delegated constructors.Samuel Benzaquen2014-10-011-3/+9
| | | | | | | | Do not use delegated constructors. It is not supported on all platforms yet. Fixes build broken by r218769. llvm-svn: 218779
* Move the complex address expression out of DIVariable and into an extraAdrian Prantl2014-10-01257-1378/+1530
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | argument of the llvm.dbg.declare/llvm.dbg.value intrinsics. Previously, DIVariable was a variable-length field that has an optional reference to a Metadata array consisting of a variable number of complex address expressions. In the case of OpPiece expressions this is wasting a lot of storage in IR, because when an aggregate type is, e.g., SROA'd into all of its n individual members, the IR will contain n copies of the DIVariable, all alike, only differing in the complex address reference at the end. By making the complex address into an extra argument of the dbg.value/dbg.declare intrinsics, all of the pieces can reference the same variable and the complex address expressions can be uniqued across the CU, too. Down the road, this will allow us to move other flags, such as "indirection" out of the DIVariable, too. The new intrinsics look like this: declare void @llvm.dbg.declare(metadata %storage, metadata %var, metadata %expr) declare void @llvm.dbg.value(metadata %storage, i64 %offset, metadata %var, metadata %expr) This patch adds a new LLVM-local tag to DIExpressions, so we can detect and pretty-print DIExpression metadata nodes. What this patch doesn't do: This patch does not touch the "Indirect" field in DIVariable; but moving that into the expression would be a natural next step. http://reviews.llvm.org/D4919 rdar://problem/17994491 Thanks to dblaikie and dexonsmith for reviewing this patch! llvm-svn: 218778
* Update CGDebugInfo to the updated API in LLVM.Adrian Prantl2014-10-017-34/+38
| | | | | | | | | | Complex address expressions are no longer part of DIVariable, but rather an extra argument to the debug intrinsics. http://reviews.llvm.org/D4919 rdar://problem/17994491 llvm-svn: 218777
* R600: Call EmitFunctionHeader() in the AsmPrinter to populate the ELF symbol ↵Tom Stellard2014-10-01266-1520/+1521
| | | | | | table llvm-svn: 218776
* C API: Add LLVMCloneModule()Tom Stellard2014-10-012-0/+13
| | | | llvm-svn: 218775
* Adds 'override' to overriding methods. NFC.Fariborz Jahanian2014-10-0111-29/+30
| | | | | | These were uncoveredby my yet undelivered patch. llvm-svn: 218774
* thread state coordinator: replaced shortened type name Func suffix with ↵Todd Fiala2014-10-012-30/+30
| | | | | | | | | | | | Function. ThreadIDFunc => ThreadIDFunction LogFunc => LogIDFunction We try to avoid abbreviations/shortened names. Adjusted function parameter names as well to replace _func with _function. llvm-svn: 218773
* [clang-tidy] Clarify a comment.Alexander Kornienko2014-10-011-1/+2
| | | | | | No functional changes. llvm-svn: 218772
* Revert r216862 due to a performance regressionJingyue Wu2014-10-014-59/+28
| | | | | | Reported by Alexey Volkov in PR21115 llvm-svn: 218771
* Minor tweak to Ed's FreeBSD fix.Todd Fiala2014-10-011-1/+1
| | | | | | | Fall back to including the Linux version if not on __FreeBSD__. Also covers __ANDROID__ case. llvm-svn: 218770
* Refactor Matcher<T> and DynTypedMatcher to reduce overhead of casts.Samuel Benzaquen2014-10-016-215/+308
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This change introduces DynMatcherInterface and changes the internal representation of DynTypedMatcher and Matcher<T> to use a generic interface instead. It removes unnecessary indirections and virtual function calls when converting matchers by implicit and dynamic casts. DynTypedMatcher now remembers the stricter type in the chain of casts and checks it before calling into DynMatcherInterface. This change improves our clang-tidy related benchmark by ~14%. Also, it opens the door for more optimizations of this kind that are coming in future changes. As a side effect of removing these template instantiations, it also speeds up compilation of Dynamic/Registry.cpp by ~17% and reduces the number of symbols generated by ~30%. Reviewers: klimek Subscribers: klimek, cfe-commits Differential Revision: http://reviews.llvm.org/D5542 llvm-svn: 218769
* [mips] Rename emit and parse functions for the .cpload assembler directive. NFC.Toma Tabacu2014-10-013-10/+10
| | | | | | | | | | | | | | Summary: It's better if we have a consistent name for .cpload-related functions. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D5437 llvm-svn: 218768
* R600/SI: Add a generic pseudo EXP instructionTom Stellard2014-10-013-8/+30
| | | | llvm-svn: 218767
* R600/SI: Add generic pseudo MTBUF instructionsTom Stellard2014-10-013-31/+58
| | | | llvm-svn: 218766
* R600/SI: Add generic pseudo SMRD instructionsTom Stellard2014-10-012-14/+39
| | | | llvm-svn: 218765
* [asan] Scale back mmap_limit_mb test.Evgeniy Stepanov2014-10-011-4/+4
| | | | | | | | There is some strange interaction between mmap limit and unlimited stack (ulimit -s unlimited), which results in this test failing when run with "make". llvm-svn: 218764
* [ARM] Allow selecting VRINT[APMXZR] and VCVT[BT] instructions for FPv5Oliver Stannard2014-10-014-52/+82
| | | | | | | | | | Currently, we only codegen the VRINT[APMXZR] and VCVT[BT] instructions when targeting ARMv8, but they are actually present on any target with FP-ARMv8. Note that FP-ARMv8 is called FPv5 when is is part of an M-profile core, but they have the same instructions so we model them both as FPARMv8 in the ARM backend. llvm-svn: 218763
* Add a bandaid to fix the FreeBSD buildEd Maste2014-10-011-0/+4
| | | | | | | | | | | | r218568 added an explicit #include of the Linux ProcessMonitor.h to POSIXThread.cpp, rather than including just "ProcessMonitor.h" and relying on the build infrastructure for the appropriate paths. For now add #ifdefs in the source to use the FreeBSD or Linux header as appropriate; a cleaner fix (and perhaps some refactoring of the POSIX classes) should still be done later. llvm-svn: 218762
* [sanitizer] Add i686 arch to compiler-rt.Evgeniy Stepanov2014-10-015-7/+14
| | | | | | | | | | This is needed so we can produce -i686- named libraries for x86 Android (which is i686-linux-android). An alternative solution would be keeping the "i386" name internally and tweaking the OUTPUT_NAME of compiler-rt libraries. llvm-svn: 218761
* [clang-tidy] Handle c-style casts from/to enums.Alexander Kornienko2014-10-012-12/+31
| | | | | | | | | | | | | | Summary: Convert c-style casts between integral end enum types to static_cast<>. Reviewers: klimek Reviewed By: klimek Subscribers: curdeius, cfe-commits Differential Revision: http://reviews.llvm.org/D5558 llvm-svn: 218760
* [asan] Tune down mmap_limit_mb test.Evgeniy Stepanov2014-10-011-6/+6
| | | | | | The memory limits were a bit too large for 32-bit Android. llvm-svn: 218759
* [RTC] Use the domain to split alias groups.Johannes Doerfert2014-10-013-0/+149
| | | | | | | | | | | | | | We use a parametric abstraction of the domain to split alias groups if accesses cannot be executed under the same parameter evaluation. The two test cases check that we can remove alias groups if the pointers which might alias are never accessed under the same parameter evaluation and that the minimal/maximal accesses are not global but with regards to the parameter evaluation. Differential Revision: http://reviews.llvm.org/D5436 llvm-svn: 218758
* [RTC] Split alias groups according to read only base addressesJohannes Doerfert2014-10-014-16/+99
| | | | | | | | | | | | If there are multiple read only base addresses in an alias group we can split it into multiple alias groups each with only one read only access. This way we might reduce the number of comparisons significantly as it grows linear in the number of alias groups but exponential in their size. Differential Revision: http://reviews.llvm.org/D5435 llvm-svn: 218757
* [x86] Fix a few more tiny patterns with the new vector shuffle loweringChandler Carruth2014-10-012-5/+213
| | | | | | | | | | | | | | | | | | | that keep cropping up in the regression test suite. This also addresses one of the issues raised on the mailing list with failing to form 'movsd' in as many cases as we realistically should. There will be corresponding patches forthcoming for v4f32 at least. This was a lot of fuss for a relatively small gain, but all the fuss was on my end trying different ways of holding the pieces of the x86 fragment patterns *just right*. Now that it works, the code is reasonably simple. In the new test cases I'm adding here, v2i64 sticks out as just plain horrible. I've not come up with any great ideas here other than that it would be nice to recognize when we're *going* to take a domain crossing hit and cross earlier to get the decent instructions. At least with AVX it is slightly less silly.... llvm-svn: 218756
* [x86] Delete some extraneous logic from the new vector shuffle lowering.Chandler Carruth2014-10-011-7/+0
| | | | | | | | Nothing was relying on this and there are potentially some edge cases that it would not be correct under. Removing it seems better than trying to "fix" it as nothing was relying on it. llvm-svn: 218755
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