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* R600/SI: Fix live range error hidden by SIFoldOperandsMatt Arsenault2014-12-031-0/+9
| | | | | | | | | | | | | | | m0 is treated as a virtual register class with a single register rather than the physical register it really is. This was updating the live range of the used virtual copy of m0 from the first ds_read instruction, and leaving the unused copy unchanged. This resulted in a "Live segment doesn't end at a valid instruction" verifier error because the erased instructions. Update the live range of the second copy (which should be dead). No test since I'm not sure how to trigger this with SIFoldOperands enabled. llvm-svn: 223203
* ADT: Add SmallVector<>::emplace_back(): fixupDuncan P. N. Exon Smith2014-12-031-1/+1
| | | | | | | Add missing `void` return type from `!LLVM_HAS_VARIADIC_TEMPLATES` case in r223201. llvm-svn: 223202
* ADT: Add SmallVector<>::emplace_back()Duncan P. N. Exon Smith2014-12-032-0/+176
| | | | llvm-svn: 223201
* [PECOFF] Fix a bug in /export option handler.Rui Ueyama2014-12-032-7/+12
| | | | | | | | | | | | | | | | | | | /export option can be given multiple times to specify multiple symbols to be exported. /export accepts both decorated and undecorated name. If you give both undecorated and decorated name of the same symbol to /export, they are resolved to the same symbol. In this case, we need to de-duplicate the exported names, so that we don't have duplicated items in the export symbol table in a DLL. We remove duplicate items from a vector. The bug was there. Because we had pointers pointing to elements of the vector, after an item is removed, they would point wrong elements. This patch is to remove these pointers. Added a test for that case. llvm-svn: 223200
* StructurizeCFG: Use LoopInfo analysis for better loop detectionTom Stellard2014-12-032-1/+47
| | | | | | | | We were assuming that each back-edge in a region represented a unique loop, which is not always the case. We need to use LoopInfo to correctly determine which back-edges are loops. llvm-svn: 223199
* NVPTX: Delete dead codeDuncan P. N. Exon Smith2014-12-031-5/+0
| | | | | | `MDNode` does not inherit from `User`, and it never has a name. llvm-svn: 223198
* R600/SI: Enable inline assemblyTom Stellard2014-12-032-2/+12
| | | | | | | | We just needed to remove the assertion in AMDGPURegisterInfo::getFrameRegister(), which is called when initializing the parser for inline assembly. llvm-svn: 223197
* Update setMCJITMemoryManager call to keep in line with llvm r223183.Jason Molenda2014-12-031-1/+1
| | | | | | Patch from Ryan Goodfellow. llvm-svn: 223196
* [OCaml] [cmake] Disable OCaml bindings if ctypes >=0.3 is not found.Peter Zotov2014-12-031-4/+8
| | | | llvm-svn: 223195
* R600/SI: Change mubuf offsets to print as decimalMatt Arsenault2014-12-0317-95/+95
| | | | | | This matches SC's behavior. llvm-svn: 223194
* Emit the entry block first and the exit block second, then all the blocks in ↵Nick Lewycky2014-12-032-3/+73
| | | | | | between afterwards. This is what gcc always does, and some out of tree tools depend on that. llvm-svn: 223193
* GCRelocateOperands: Try to appease msc17.NAKAMURA Takumi2014-12-031-2/+3
| | | | llvm-svn: 223192
* Update test to check for prologue instead of prefixPeter Collingbourne2014-12-031-1/+1
| | | | llvm-svn: 223191
* UBSan now uses prologue data instead of prefix dataPeter Collingbourne2014-12-031-6/+6
| | | | | | | | | | | | As the semantics of prefix data has changed. See D6454. Patch by Ben Gamari! Test Plan: Testsuite Differential Revision: http://reviews.llvm.org/D6489 llvm-svn: 223190
* Prologue supportPeter Collingbourne2014-12-0323-65/+306
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch by Ben Gamari! This redefines the `prefix` attribute introduced previously and introduces a `prologue` attribute. There are a two primary usecases that these attributes aim to serve, 1. Function prologue sigils 2. Function hot-patching: Enable the user to insert `nop` operations at the beginning of the function which can later be safely replaced with a call to some instrumentation facility 3. Runtime metadata: Allow a compiler to insert data for use by the runtime during execution. GHC is one example of a compiler that needs this functionality for its tables-next-to-code functionality. Previously `prefix` served cases (1) and (2) quite well by allowing the user to introduce arbitrary data at the entrypoint but before the function body. Case (3), however, was poorly handled by this approach as it required that prefix data was valid executable code. Here we redefine the notion of prefix data to instead be data which occurs immediately before the function entrypoint (i.e. the symbol address). Since prefix data now occurs before the function entrypoint, there is no need for the data to be valid code. The previous notion of prefix data now goes under the name "prologue data" to emphasize its duality with the function epilogue. The intention here is to handle cases (1) and (2) with prologue data and case (3) with prefix data. References ---------- This idea arose out of discussions[1] with Reid Kleckner in response to a proposal to introduce the notion of symbol offsets to enable handling of case (3). [1] http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-May/073235.html Test Plan: testsuite Differential Revision: http://reviews.llvm.org/D6454 llvm-svn: 223189
* ExceptionDemo: Let setMCJITMemoryManager() take unique_ptr, since r223183.NAKAMURA Takumi2014-12-031-2/+2
| | | | llvm-svn: 223188
* [X86][MC] Intel syntax: accept implicit memory operand sizes larger than 80.Ahmed Bougacha2014-12-032-1/+27
| | | | | | | | | | The X86AsmParser intel handling was refactored in r216481, making it try each different memory operand size to see which one matches. Operand sizes larger than 80 ("[xyz]mmword ptr") were forgotten, which led to an "invalid operand" error for code such as: movdqa [rax], xmm0 llvm-svn: 223187
* Add support for has_feature(cxx_alignof) and has_feature(c_alignof).Nico Weber2014-12-035-4/+35
| | | | | | | r142020 added support for has_feature(cxx_alignas). This does the same for alignof. llvm-svn: 223186
* Fix incorrect codegen for devirtualized calls to virtual overloaded operators.Nico Weber2014-12-034-59/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Consider this program: struct A { virtual void operator-() { printf("base\n"); } }; struct B final : public A { virtual void operator-() override { printf("derived\n"); } }; int main() { B* b = new B; -static_cast<A&>(*b); } Before this patch, clang saw the virtual call to A::operator-(), figured out that it can be devirtualized, and then just called A::operator-() directly, without going through the vtable. Instead, it should've looked up which operator-() the call devirtualizes to and should've called that. For regular virtual member calls, clang gets all this right already. So instead of giving EmitCXXOperatorMemberCallee() all the logic that EmitCXXMemberCallExpr() already has, cut the latter function into two pieces, call the second piece EmitCXXMemberOrOperatorMemberCallExpr(), and use it also to generate code for calls to virtual member operators. This way, virtual overloaded operators automatically don't get devirtualized if they have covariant returns (like it was done for regular calls in r218602), etc. This also happens to fix (or at least improve) codegen for explicit constructor calls (`A a; a.A::A()`) in MS mode with -fsanitize-address-field-padding=1. (This adjustment for virtual operator calls seems still wrong with the MS ABI.) llvm-svn: 223185
* PR21706: -Wunsequenced was missing warnings when leaving a sequenced region ↵Richard Smith2014-12-032-7/+13
| | | | | | that contained side effects. llvm-svn: 223184
* [MCJIT] Unique-ptrify the RTDyldMemoryManager member of MCJIT. NFC.Lang Hames2014-12-038-29/+51
| | | | llvm-svn: 223183
* [PowerPC] Fix readcyclecounter to be custom expanded for all 32-bit targetsHal Finkel2014-12-032-6/+5
| | | | | | | We need to use the custom expansion of readcyclecounter on all 32-bit targets (even those with 64-bit registers). This should fix the ppc64 buildbot. llvm-svn: 223182
* [asan] fix four asan tests to run in use-after-return mode Kostya Serebryany2014-12-034-5/+15
| | | | llvm-svn: 223181
* AArch64: strengthen Darwin ABI alignment assumptionsTim Northover2014-12-024-11/+8
| | | | | | | | | | A global variable without an explicit alignment specified should be assumed to be ABI-aligned according to its type, like on other platforms. This allows us to use better memory operations when accessing it. rdar://18533701 llvm-svn: 223180
* FullProduct should be _FullProductDavid Majnemer2014-12-021-2/+2
| | | | llvm-svn: 223179
* Use a typed enum instead of 'unsigned char' for packed field. NFC.Pete Cooper2014-12-021-7/+5
| | | | | | This makes it easier to debug Twine as the 'Kind' fields now show their enum values in lldb and not escaped characters. llvm-svn: 223178
* Ensure typos in the default values of template parameters get diagnosed.Kaelyn Takata2014-12-023-1/+11
| | | | llvm-svn: 223177
* Intrin: shrx_u64 should be _shrx_u64David Majnemer2014-12-021-1/+1
| | | | llvm-svn: 223176
* Intrin: Add _umul128David Majnemer2014-12-021-3/+12
| | | | | | | | | | | | | | Implement _umul128; it provides the high and low halves of a 128-bit multiply. We can simply use our __int128 arithmetic to implement this, we generate great code for it: movq %rdx, %rax mulq %rcx movq %rdx, (%r8) retq Differential Revision: http://reviews.llvm.org/D6486 llvm-svn: 223175
* Mark the armv7 q0-q3 and q8-q15 registers as volatile (not calleeJason Molenda2014-12-021-0/+30
| | | | | | | | | | | | preserved) in the ABI. Realistically lldb isn't able to track register saves of any of the neon regs right now so we should probably mark all of the regs as unavailable when you're not on stack frame 0... <rdar://problem/19115127> llvm-svn: 223174
* InstrProf: Use the same names for variables as we use in the profileJustin Bogner2014-12-027-28/+24
| | | | | | | | There's no need to use different names for the local variables than we use in the profile itself, and it's a bit simpler and easier to debug if we're consistent. llvm-svn: 223173
* AArch64: don't be too greedy when folding :lo12: accesses into mem ops.Tim Northover2014-12-025-35/+48
| | | | | | | | | | | | | | | This frequently leads to cases like: ldr xD, [xN, :lo12:var] add xA, xN, :lo12:var ldr xD, [xA, #8] where the ADD would have been needed anyway, and the two distinct addressing modes can prevent the formation of an ldp. Because of how we handle ADRP (aggressively forming an ADRP/ADD pseudo-inst at ISel time), this pattern also results in duplicated ADRP instructions (one on its own to cover the ldr, and one combined with the add). llvm-svn: 223172
* PR21302. Vectorize only bottom-tested loops.Michael Zolotukhin2014-12-022-0/+40
| | | | | | rdar://problem/18886083 llvm-svn: 223171
* Apply loop-rotate to several vectorizer tests.Michael Zolotukhin2014-12-023-181/+151
| | | | | | | | Such loops shouldn't be vectorized due to the loops form. After applying loop-rotate (+simplifycfg) the tests again start to check what they are intended to check. llvm-svn: 223170
* Another warning with no group name bites the dust.Fariborz Jahanian2014-12-022-3/+3
| | | | | | rdar://19116886 llvm-svn: 223168
* InstrProf: Remove some pointless indirection (NFC)Justin Bogner2014-12-022-15/+15
| | | | | | | | It doesn't make much sense to have std::unique_ptrs of std::string and std::vector. Avoid some useless indirection by using these types directly. llvm-svn: 223166
* [X86][SSE] Keep 4i32 vector insertions in integer domain on SSE4.1 targetsSimon Pilgrim2014-12-025-26/+26
| | | | | | | | | | 4i32 shuffles for single insertions into zero vectors lowers to X86vzmovl which was using (v)blendps - causing domain switch stalls. This patch fixes this by using (v)pblendw instead. The updated tests on test/CodeGen/X86/sse41.ll still contain a domain stall due to the use of insertps - I'm looking at fixing this in a future patch. Differential Revision: http://reviews.llvm.org/D6458 llvm-svn: 223165
* Replace InternalScopedBuffer<char> with InternalScopedString where applicable.Alexey Samsonov2014-12-0211-47/+38
| | | | | | | | | | | | | | | | Summary: No functionality change. Test Plan: make check-all Reviewers: kcc Reviewed By: kcc Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6472 llvm-svn: 223164
* Give lit a --xunit-xml-output option for saving results in xunit formatChris Matthews2014-12-022-7/+55
| | | | | | | | --xunit-xml-output saves test results to disk in JUnit's xml format. This will allow Jenkins to report the details of a lit run. Based on a patch by David Chisnall. llvm-svn: 223163
* Diagnose TypoExprs in a couple of error cases in ParsePostfixExpressionSuffix.Kaelyn Takata2014-12-022-3/+7
| | | | | | | Also have CorrectDelayedTyposInExpr check that the Expr* isn't null before trying to access its members. Fixes PR21679. llvm-svn: 223162
* [PowerPC] Implement readcyclecounter for PPC32Hal Finkel2014-12-026-0/+102
| | | | | | | | | | | | | | | | | | | We've long supported readcyclecounter on PPC64, but it is easier there (the read of the 64-bit time-base register can be accomplished via a single instruction). This now provides an implementation for PPC32 as well. On PPC32, the time-base register is still 64 bits, but can only be read 32 bits at a time via two separate SPRs. The ISA manual explains how to do this properly (it involves re-reading the upper bits and looping if the counter has wrapped while being read). This requires PPC to implement a custom integer splitting legalization for the READCYCLECOUNTER node, turning it into a target-specific SDAG node, which then gets turned into a pseudo-instruction, which is then expanded to the necessary sequence (which has three SPR reads, the comparison and the branch). Thanks to Paul Hargrove for pointing out to me that this was still unimplemented. llvm-svn: 223161
* R600/SI: Emit amd_kernel_code_t header for AMDGPU environmentTom Stellard2014-12-025-1/+829
| | | | llvm-svn: 223160
* Make sure that the TargetOptions operator== is checking theEric Christopher2014-12-021-0/+6
| | | | | | full contents of the class. llvm-svn: 223159
* Add missing #include to fix Android build.Alexey Samsonov2014-12-021-0/+1
| | | | llvm-svn: 223157
* [AArch64][Stackmaps] Optimize stackmap shadows on AArch64.Lang Hames2014-12-022-1/+31
| | | | | | | | | | Reduce the number of nops emitted for stackmap shadows on AArch64 by counting non-stackmap instructions up to the next branch target towards the requested shadow. <rdar://problem/14959522> llvm-svn: 223156
* Fix broken test suite on Windows after r223091.Zachary Turner2014-12-021-3/+6
| | | | | | | Differential Revision: http://reviews.llvm.org/D6484 Reviewed by: Oleksiy Vyalov llvm-svn: 223155
* R600/SI: Move more information into SIProgramInfo structTom Stellard2014-12-025-53/+83
| | | | llvm-svn: 223154
* Add bindings for the rest of the MCJIT options that we previouslyEric Christopher2014-12-022-0/+15
| | | | | | | had support for. We're still missing a binding for an MCJIT memory manager. llvm-svn: 223153
* checkout_isl: Do not fail in presence of an old CLooG checkoutTobias Grosser2014-12-021-1/+13
| | | | | | This should help our buildbots and may also simplify life for other people. llvm-svn: 223152
* R600: Cleanup some tests and add missing testcasesMatt Arsenault2014-12-026-234/+363
| | | | llvm-svn: 223151
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