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* [ValueTracking] recognize variations of 'clamp' to improve codegen (PR31693)Sanjay Patel2017-01-203-27/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By enhancing value tracking, we allow an existing min/max canonicalization to kick in and improve codegen for several targets that have min/max instructions. Unfortunately, recognizing min/max in value tracking may cause us to hit a hack in InstCombiner::visitICmpInst() more often: http://lists.llvm.org/pipermail/llvm-dev/2017-January/109340.html ...but I'm hoping we can remove that soon. Correctness proofs based on Alive: Name: smaxmin Pre: C1 < C2 %cmp2 = icmp slt i8 %x, C2 %min = select i1 %cmp2, i8 %x, i8 C2 %cmp3 = icmp slt i8 %x, C1 %r = select i1 %cmp3, i8 C1, i8 %min => %cmp2 = icmp slt i8 %x, C2 %min = select i1 %cmp2, i8 %x, i8 C2 %cmp1 = icmp sgt i8 %min, C1 %r = select i1 %cmp1, i8 %min, i8 C1 Name: sminmax Pre: C1 > C2 %cmp2 = icmp sgt i8 %x, C2 %max = select i1 %cmp2, i8 %x, i8 C2 %cmp3 = icmp sgt i8 %x, C1 %r = select i1 %cmp3, i8 C1, i8 %max => %cmp2 = icmp sgt i8 %x, C2 %max = select i1 %cmp2, i8 %x, i8 C2 %cmp1 = icmp slt i8 %max, C1 %r = select i1 %cmp1, i8 %max, i8 C1 ---------------------------------------- Optimization: smaxmin Done: 1 Optimization is correct! ---------------------------------------- Optimization: sminmax Done: 1 Optimization is correct! Name: umaxmin Pre: C1 u< C2 %cmp2 = icmp ult i8 %x, C2 %min = select i1 %cmp2, i8 %x, i8 C2 %cmp3 = icmp ult i8 %x, C1 %r = select i1 %cmp3, i8 C1, i8 %min => %cmp2 = icmp ult i8 %x, C2 %min = select i1 %cmp2, i8 %x, i8 C2 %cmp1 = icmp ugt i8 %min, C1 %r = select i1 %cmp1, i8 %min, i8 C1 Name: uminmax Pre: C1 u> C2 %cmp2 = icmp ugt i8 %x, C2 %max = select i1 %cmp2, i8 %x, i8 C2 %cmp3 = icmp ugt i8 %x, C1 %r = select i1 %cmp3, i8 C1, i8 %max => %cmp2 = icmp ugt i8 %x, C2 %max = select i1 %cmp2, i8 %x, i8 C2 %cmp1 = icmp ult i8 %max, C1 %r = select i1 %cmp1, i8 %max, i8 C1 ---------------------------------------- Optimization: umaxmin Done: 1 Optimization is correct! ---------------------------------------- Optimization: uminmax Done: 1 Optimization is correct! llvm-svn: 292660
* [Altivec] Change vec_sl to a << (b % (sizeof(a) * 8))Tim Shen2017-01-202-31/+49
| | | | | | | | | | | | | | | | | For a << b (as original vec_sl does), if b >= sizeof(a) * 8, the behavior is undefined. However, Power instructions do define the behavior, which is equivalent to a << (b % (sizeof(a) * 8)). This patch changes altivec.h to use a << (b % (sizeof(a) * 8)), to ensure the consistent semantic of the instructions. Then it combines the generated multiple instructions back to a single shift. This patch handles left shift only. Right shift, on the other hand, is more complicated, considering arithematic/logical right shift. Differential Revision: https://reviews.llvm.org/D28037 llvm-svn: 292659
* docs: Document that !absolute_symbol { all-ones, all-ones } means the full set.Peter Collingbourne2017-01-201-2/+5
| | | | llvm-svn: 292657
* [ThinLTO] Drop non-prevailing non-ODR weak to declarationsTeresa Johnson2017-01-207-23/+119
| | | | | | | | | | | | | | | Summary: Allow non-ODR weak/linkonce non-prevailing copies to be marked as available_externally in the index. Add support for dropping these to declarations in the backend. Reviewers: mehdi_amini, pcc Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D28806 llvm-svn: 292656
* [InstCombine] add tests to show missed canonicalization of min/max; NFCSanjay Patel2017-01-201-0/+71
| | | | | | | | | | | Unfortunately, recognizing these in value tracking may cause us to hit a hack in InstCombiner::visitICmpInst() more often: http://lists.llvm.org/pipermail/llvm-dev/2017-January/109340.html ...but besides being the obviously Right Thing To Do, there's a clear codegen win from identifying these patterns for several targets. llvm-svn: 292655
* LowerTypeTests: Implement importing of type identifiers.Peter Collingbourne2017-01-203-2/+285
| | | | | | | | | To import a type identifier we read the summary and create external references to the symbols defined when exporting. Differential Revision: https://reviews.llvm.org/D28546 llvm-svn: 292654
* [globalisel] Fix an unused variable warning when NDEBUG is defined.Daniel Sanders2017-01-201-1/+1
| | | | llvm-svn: 292653
* [libFuzzer] add an assert to protect against LLVMFuzzerInitialize changing ↵Kostya Serebryany2017-01-204-0/+22
| | | | | | argv[0] llvm-svn: 292652
* AMDGPU/R600: Serialize vector trunc stores to private ASJan Vesely2017-01-206-18/+59
| | | | | | | | | | | Add DUMMY_CHAIN SDNode to denote stores of interest Bugzilla: https://llvm.org/bugs/show_bug.cgi?id=28915 Bugzilla: https://llvm.org/bugs/show_bug.cgi?id=30411 Differential Revision: https://reviews.llvm.org/D27964 llvm-svn: 292651
* [sanitizer] [asan] Use macros to simplify weak aliases on Windows.Marcos Pividori2017-01-207-70/+77
| | | | | | | | | This patch adds some useful macros for dealing with pragma directives on Windows. Also, I add appropriate documentation for future users. Differential Revision: https://reviews.llvm.org/D28525 llvm-svn: 292650
* NewGVN: Remove pr31686.ll, it is tested by pr31594.ll, which is much smaller ↵Daniel Berlin2017-01-201-2016/+0
| | | | | | and simpler llvm-svn: 292649
* NewGVN: Fix PR 31686 and PR 31698 by rewriting store leader handling.Daniel Berlin2017-01-206-39/+2098
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This rewrites store expression/leader handling. We no longer use the value operand as the leader, instead, we store it separately. We also now store the stored value as part of the expression, and compare it when comparing stores for equality. This enables us to get rid of a bunch of our previous hacks and machinations, as the existing machinery takes care of everything *except* updating the stored value on classes. The only time we have to update it is if the storecount goes to 0, and when we do, we destroy it. Since we no longer use the value operand as the leader, during elimination, we have to use the value operand. Doing this also fixes a bunch of store forwarding cases we were missing. Any value operand we use is guaranteed to either be updated by previous eliminations, or minimized by future ones. (IE the fact that we don't use the most dominating value operand when it's not a constant does not affect anything). Sadly, this change also exposes that we didn't pay attention to the output of the pr31594.ll test, as it also very clearly exposes the same store leader bug we are fixing here. (I added pr31682.ll anyway, but maybe we think that's too large to be useful) On the plus side, propagate-ir-flags.ll now passes due to the corrected store forwarding. This change was 3 stage'd on darwin and linux, with the full test-suite. Reviewers: davide Subscribers: llvm-commits llvm-svn: 292648
* LowerTypeTests: Compute SizeM1BitWidth in exportTypeId. NFCI.Peter Collingbourne2017-01-201-7/+6
| | | | | | This avoids needing to store it in a separate field in TypeIdLowering. llvm-svn: 292647
* [libFuzzer] experimental support for 'equivalance fuzzing'Kostya Serebryany2017-01-2010-7/+243
| | | | llvm-svn: 292646
* [WebAssembly] Don't create bitcast-wrappers for varargs.Dan Gohman2017-01-202-0/+22
| | | | | | | | | WebAssembly varargs functions use a significantly different ABI than non-varargs functions, and the current code in WebAssemblyFixFunctionBitcasts doesn't handle that difference. For now, just avoid creating wrapper functions in the presence of varargs. llvm-svn: 292645
* Don't create a bogus PT_PHDR if we don't allocate the headers.Rafael Espindola2017-01-206-21/+25
| | | | llvm-svn: 292644
* Revert "Don't inline dllimport functions referencing non-imported methods"Reid Kleckner2017-01-202-12/+0
| | | | | | | This reverts commit r292522. It appears to be causing crashes in builds using dllimport. llvm-svn: 292643
* Reduce code duplication when allocating program headers.Rafael Espindola2017-01-203-40/+38
| | | | | | This will simplify a bug fix. llvm-svn: 292642
* [ThinLTO] Fix lazy-loading of MDString instruction attachmentsMehdi Amini2017-01-204-9/+26
| | | | | | | | | CFI is using intrinsics that takes MDString as arguments, and this was broken during lazy-loading of metadata. Differential Revision: https://reviews.llvm.org/D28916 llvm-svn: 292641
* [x86] add tests to show missed min/max vector codegen (PR31693)Sanjay Patel2017-01-201-12/+73
| | | | llvm-svn: 292640
* Revert r292508 given that we intend to remove driver options for cxx modules.Manman Ren2017-01-203-13/+2
| | | | llvm-svn: 292639
* Fix catch_reference_nullptr.pass.cpp test for GCC.Eric Fiselier2017-01-201-7/+1
| | | | | | | | | | | | This test contained an implicit conversion from nullptr to bool. Clang warns about this but the test had supressed that warning. However GCC diagnoses the same code as an error and requires -fpermissive to accept it. This patch fixes both the warning and the error by explicitly converting the pointer to bool. llvm-svn: 292638
* [docs] Regenerate DiagnosticsReference.rst. We don't have automatic ↵Richard Smith2017-01-201-76/+447
| | | | | | generation of this set up server-side yet. llvm-svn: 292637
* AMDGPU: Add builtin for getreg intrinsicMatt Arsenault2017-01-203-0/+17
| | | | llvm-svn: 292636
* [Sema] Remove dead typedefBruno Cardoso Lopes2017-01-201-1/+0
| | | | llvm-svn: 292635
* [DWARF] [ObjectYAML] Adding APIs for unittestingChris Bieneman2017-01-206-64/+131
| | | | | | | | | | | | Summary: This patch adds some new APIs to enable using the YAML DWARF representation in unit tests. The most basic new API is DWARFYAML::EmitDebugSections which converts a YAML string into a series of owned MemoryBuffer objects stored in a StringMap. The string map can then be used to construct a DWARFContext for parsing in place of an ObjectFile. Reviewers: dblaikie, clayborg Subscribers: mgorny, fhahn, jgosnell, aprantl, llvm-commits Differential Revision: https://reviews.llvm.org/D28828 llvm-svn: 292634
* Recommit "[InlineCost] Use TTI to check if GEP is free." #3Haicheng Wu2017-01-203-2/+50
| | | | | | | | | | | | This is the third attemp to recommit r292526. The original summary: Currently, a GEP is considered free only if its indices are all constant. TTI::getGEPCost() can give target-specific more accurate analysis. TTI is already used for the cost of many other instructions. llvm-svn: 292633
* Fix actually-reachable llvm_unreachable.Richard Smith2017-01-202-2/+12
| | | | llvm-svn: 292632
* [SLP] Initial test for fix of PR31690.Alexey Bataev2017-01-201-0/+203
| | | | llvm-svn: 292631
* [scudo] Replacing std::atomic with Sanitizer's atomicsKostya Kortchinsky2017-01-206-17/+11
| | | | | | | | | | | | | | | | | Summary: In an effort to getting rid of dependencies to external libraries, we are replacing atomic PackedHeader use of std::atomic with Sanitizer's atomic_uint64_t, which allows us to avoid -latomic. Reviewers: kcc, phosek, alekseyshl Reviewed By: alekseyshl Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D28864 llvm-svn: 292630
* ARM: tLDR_postidx should be marked mayLoadMatthias Braun2017-01-201-1/+1
| | | | | | This fixes -verify-machineinstrs complaints. llvm-svn: 292629
* Simplify. NFC.Rafael Espindola2017-01-201-6/+1
| | | | | | | addIgnored already creates the symbol only if there is a reference to it. llvm-svn: 292628
* [InstCombine][X86] Add MULDQ/MULUDQ undef handlingSimon Pilgrim2017-01-203-12/+81
| | | | llvm-svn: 292627
* [SLP] A new test for horizontal vectorization for non-power-of-2Alexey Bataev2017-01-201-0/+290
| | | | | | instructions. llvm-svn: 292626
* AArch64LoadStoreOptimizer: Update kill flags when merging storesMatthias Braun2017-01-203-135/+155
| | | | | | | | | | | | | | Kill flags need to be updated correctly when moving stores up/down to form store pair instructions. Those invalid flags have been ignored before but as of r290014 they are recognized when using -mllvm -verify-machineinstrs. Also simplifies test/CodeGen/AArch64/ldst-opt-dbg-limit.mir, renames it to ldst-opt.mir test and adds a new tests for this change. Differential Revision: https://reviews.llvm.org/D28875 llvm-svn: 292625
* [mips] Fix debug information for __thread variablePetar Jovanovic2017-01-208-1/+65
| | | | | | | | | | | This patch fixes debug information for __thread variable on Mips using .dtprelword and .dtpreldword directives. Patch by Aleksandar Beserminji. Differential Revision: http://reviews.llvm.org/D28770 llvm-svn: 292624
* [AMDGPU] Fix some Clang-tidy modernize and Include What You Use warnings; ↵Eugene Zelenko2017-01-2011-200/+300
| | | | | | other minor fixes (NFC). llvm-svn: 292623
* [RegisterCoalescing] Recommit the patch "Remove partial redundent copy".Wei Mi2017-01-204-0/+625
| | | | | | | | | | | | | | | The recommit fixes a bug related with live interval update after the partial redundent copy is moved. The original patch is to solve the performance problem described in PR27827. Register coalescing sometimes cannot remove a copy because of interference. But if we can find a reverse copy in one of the predecessor block of the copy, the copy is partially redundent and we may remove the copy partially by moving it to the predecessor block without the reverse copy. Differential Revision: https://reviews.llvm.org/D28585 llvm-svn: 292621
* [InstCombine][SSE] Tests showing missed opportunities to handle muldq/muludq ↵Simon Pilgrim2017-01-201-4/+62
| | | | | | | | with undef arguments Fixed a typo in existing test names at the same time llvm-svn: 292619
* Revert "Recommit "[InlineCost] Use TTI to check if GEP is free." #2"Haicheng Wu2017-01-202-48/+2
| | | | | | This reverts commit r292616 because the test case still has problem. llvm-svn: 292618
* [Frontend] The macro that describes the Objective-C bool type shouldAlex Lorenz2017-01-203-6/+10
| | | | | | | | | | be defined for non Objective-C code as well rdar://29794915 Differential Revision: https://reviews.llvm.org/D28349 llvm-svn: 292617
* Recommit "[InlineCost] Use TTI to check if GEP is free." #2Haicheng Wu2017-01-202-2/+48
| | | | | | | | | | | | This is the second attemp to recommit r292526. The original summary: Currently, a GEP is considered free only if its indices are all constant. TTI::getGEPCost() can give target-specific more accurate analysis. TTI is already used for the cost of many other instructions. llvm-svn: 292616
* [Sema] Improve the error diagnostic for dot destructor calls on pointer objectsAlex Lorenz2017-01-205-10/+94
| | | | | | | | | | | | | This commit improves the mismatched destructor type error by detecting when the destructor call has used a '.' instead of a '->' on a pointer to the destructed type. The diagnostic now suggests to use '->' instead of '.', and adds a fixit where appropriate. rdar://28766702 Differential Revision: https://reviews.llvm.org/D25817 llvm-svn: 292615
* [ELF] Cleanup createThunks() NFC.Peter Smith2017-01-201-19/+14
| | | | | | | | | Include removal of call to getThunkExpr() as it has already been called and recorded by scanRelocs() Cleanup suggestions by Rafael. llvm-svn: 292614
* Remove trailing whitespace. NFCI.Simon Pilgrim2017-01-201-1/+1
| | | | llvm-svn: 292613
* [CostModel][X86] Removed unused cost. NFCI.Simon Pilgrim2017-01-201-1/+0
| | | | | | SHL v8i32 is already handled in the SSE41 cost table llvm-svn: 292612
* Prevent client from querying each thread's PC at each stop.Pavel Labath2017-01-204-36/+187
| | | | | | | | | | | | | | | | | | Summary: The server was no longer sending the thread PCs the way the client expected them. I changed the server to send them back as a threadstop info field, similar to the Apple version of the server. I also changed the client to look for them there, before querying the server. I added a test to ensure the server doesn't stop sending them. Reviewed By: labath Differential Revision: https://reviews.llvm.org/D28880 Author: Jason Majors llvm-svn: 292611
* [InstCombine][SSE] Tests showing missed opportunities to constant fold ↵Simon Pilgrim2017-01-201-0/+76
| | | | | | packss/packus llvm-svn: 292609
* [Thumb] Add support for tMUL in the compare instruction peephole optimizer.Sjoerd Meijer2017-01-203-169/+392
| | | | | | | | | | | | | | | | | We also want to optimise tests like this: return a*b == 0. The MULS instruction is flag setting, so we don't need the CMP instruction but can instead branch on the result of the MULS. The generated instructions sequence for this example was: MULS, MOVS, MOVS, CMP. The MOVS instruction load the boolean values resulting from the select instruction, but these MOVS instructions are flag setting and were thus preventing this optimisation. Now we first reorder and move the MULS to before the CMP and generate sequence MOVS, MOVS, MULS, CMP so that the optimisation could trigger. Reordering of the MULS and MOVS is safe to do because the subsequent MOVS instructions just set the CPSR register and don't use it, i.e. the CPSR is dead. Differential Revision: https://reviews.llvm.org/D27990 llvm-svn: 292608
* Don't default older GCC's to C++17, but C++14 or C++11 insteadEric Fiselier2017-01-201-0/+9
| | | | llvm-svn: 292607
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