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* Fix MSVC "not all control paths return a value" warning. NFCI.Simon Pilgrim2018-10-221-0/+1
| | | | llvm-svn: 344892
* [OpenCL] Fix definitions of __builtin_(add|sub|mul)_overflowMarco Antognini2018-10-221-3/+3
| | | | | | | | | Ensure __builtin_(add|sub|mul)_overflow return bool instead of void as per specification (LanguageExtensions). Differential Revision: https://reviews.llvm.org/D52875 llvm-svn: 344891
* [ARM][AArch64] Add LLVM_FALLTHROUGH to silence warning [NFC]Peter Smith2018-10-221-0/+1
| | | | | | | | | | A follow up to D52784 to add in LLVM_FALLTHROUGH where there is an intentional fall through in a switch statement. This will hopefully silence a GCC warning. Differential Revision: https://reviews.llvm.org/D52784 llvm-svn: 344890
* [CodeComplete] Fix accessibility of protected members when accessing members ↵Eric Liu2018-10-222-9/+27
| | | | | | | | | | | | implicitly. Reviewers: ilya-biryukov Subscribers: arphaman, cfe-commits Differential Revision: https://reviews.llvm.org/D53369 llvm-svn: 344889
* Use llvm::arrayRefFromStringRefSam Clegg2018-10-223-5/+2
| | | | | | Differential Revision: https://reviews.llvm.org/D53432 llvm-svn: 344888
* [WebAssembly] Simplify --help messageSam Clegg2018-10-221-9/+7
| | | | | | | | Update wasm to match ELF changes made rL333596. Differential Revision: https://reviews.llvm.org/D53421 llvm-svn: 344887
* [PDB] Extend IPDBSession's interface to retrieve frame dataAleksandr Urakov2018-10-2214-0/+247
| | | | | | | | | | | | | | | | | | Summary: This patch just extends the `IPDBSession` interface to allow retrieving of frame data through it, and adds an implementation over DIA. It is needed for an implementation (for now with DIA) of the conversion from FPO programs to DWARF expressions mentioned in D53086. Reviewers: zturner, asmith, rnk Reviewed By: asmith Subscribers: mgorny, aprantl, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D53324 llvm-svn: 344886
* ReleaseNotes: move readability-redundant-smartptr-get part down below new checksMiklos Vajna2018-10-221-4/+4
| | | | llvm-svn: 344885
* [X86] Add patterns for vector and/or/xor/andn with other types than vXi64.Craig Topper2018-10-225-6/+222
| | | | | | | | | | | | This makes fast isel treat all legal vector types the same way. Previously only vXi64 was in the fast-isel tables. This unfortunately prevents matching of andn by fast-isel for these types since the requires SelectionDAG. But we already had this issue for vXi64. So at least we're consistent now. Interestinly it looks like fast-isel can't handle instructions with constant vector arguments so the the not part of the andn patterns is selected with SelectionDAG. This explains why VPTERNLOG shows up in some of the tests. This is a subset of D53268. As I make progress on that, I will try to reduce the number of lines in the tablegen files. llvm-svn: 344884
* [IAI,LV] Avoid creating a scalar epilogue due to gaps in interleave-groups when Dorit Nuzman2018-10-224-4/+166
| | | | | | | | | | | | | | | | | | | | | | | optimizing for size LV is careful to respect -Os and not to create a scalar epilog in all cases (runtime tests, trip-counts that require a remainder loop) except for peeling due to gaps in interleave-groups. This patch fixes that; -Os will now have us invalidate such interleave-groups and vectorize without an epilog. The patch also removes a related FIXME comment that is now obsolete, and was also inaccurate: "FIXME: return None if loop requiresScalarEpilog(<MaxVF>), or look for a smaller MaxVF that does not require a scalar epilog." (requiresScalarEpilog() has nothing to do with VF). Reviewers: Ayal, hsaito, dcaballe, fhahn Reviewed By: Ayal Differential Revision: https://reviews.llvm.org/D53420 llvm-svn: 344883
* [XRay] Account for virtual memory re-useDean Michael Berris2018-10-221-3/+1
| | | | | | | Change the assumption when releasing memory to a buffer queue that new generations might not be able to re-use the memory mapped addresses. llvm-svn: 344882
* [XRay][compiler-rt] Generational Buffer ManagementDean Michael Berris2018-10-224-64/+238
| | | | | | | | | | | | | | | | | | | | | | | | Summary: This change updates the buffer queue implementation to support using a generation number to identify the lifetime of buffers. This first part introduces the notion of the generation number, without changing the way we handle the buffers yet. What's missing here is the cleanup of the buffers. Ideally we'll keep the two most recent generations. We need to ensure that before we do any writes to the buffers, that we check the generation number(s) first. Those changes will follow-on from this change. Depends on D52588. Reviewers: mboerger, eizan Subscribers: llvm-commits, jfb Differential Revision: https://reviews.llvm.org/D52974 llvm-svn: 344881
* [XRay] Handle allocator exhaustion in segmented arrayDean Michael Berris2018-10-223-5/+48
| | | | | | | | | | | | | | | | | Summary: This change allows us to handle allocator exhaustion properly in the segmented array implementation. Before this change, we relied on the caller of the `trim` function to provide a valid number of elements to trim. This change allows us to do the right thing in case the elements to trim is greater than the size of the container. Reviewers: mboerger, eizan Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D53484 llvm-svn: 344880
* [analyzer][UninitializedObjectChecker] No longer using nonloc::LazyCompoundValKristof Umann2018-10-211-25/+26
| | | | | | | | As rightly pointed out by @NoQ, nonloc::LazyCompoundVals were only used to acquire a constructed object's region, which isn't what LazyCompoundVal was made for. Differential Revision: https://reviews.llvm.org/D51300 llvm-svn: 344879
* [analyzer][www] Update alpha_checks.htmlKristof Umann2018-10-212-112/+220
| | | | | | | | I added some missing doc. I have not developed any of these checkers, it might worth really inspecting whether I wrote something terribly incorrect. Differential Revision: https://reviews.llvm.org/D52969 llvm-svn: 344878
* [X86] Stop promoting integer loads to vXi64Craig Topper2018-10-2115-589/+710
| | | | | | | | | | | | | | | | | | | | | Summary: Theoretically this was done to simplify the amount of isel patterns that were needed. But it also meant a substantial number of our isel patterns have to match an explicit bitcast. By making the vXi32/vXi16/vXi8 types legal for loads, DAG combiner should be able to change the load type to remove the bitcast. I had to add some additional plain load instruction patterns and a few other special cases, but overall the isel table has reduced in size by ~12000 bytes. So it looks like this promotion was hurting us more than helping. I still have one crash in vector-trunc.ll that I'm hoping @RKSimon can help with. It seems to relate to using getTargetConstantFromNode on a load that was shrunk due to an extract_subvector combine after the constant pool entry was created. So we end up decoding more mask elements than the load size. I'm hoping this patch will simplify the number of patterns needed to remove the and/or/xor promotion. Reviewers: RKSimon, spatel Reviewed By: RKSimon Subscribers: llvm-commits, RKSimon Differential Revision: https://reviews.llvm.org/D53306 llvm-svn: 344877
* [Sanitizer] openbsd does not have sysctlbyname callDavid Carlier2018-10-212-5/+9
| | | | | | | | | | | | Enabling only for FreeBSD. Reviewers: krytarowski, vitalybuka Reviewed By: krytarowski Differential Revision: https://reviews.llvm.org/D53413 llvm-svn: 344876
* Revert r344873 "foo"Craig Topper2018-10-214-62/+45
| | | | | | Rebase gone wrong left this in my tree. llvm-svn: 344875
* [X86] Remove SDIVREM8_SEXT_HREG/UDIVREM8_ZEXT_HREG and their associated DAG ↵Craig Topper2018-10-213-73/+54
| | | | | | | | | | | | | | | | | | | | | combine and target bits support. Use a post isel peephole instead. Summary: These nodes exist to overcome an isel problem where we can generate a zero extend of an AH register followed by an extract subreg, and another zero extend. The first zero extend exists to avoid a partial register update copying the AH register into the low 8-bits. The second zero extend exists if the user wanted the remainder zero extended. To make this work we had a DAG combine to morph the DIVREM opcode to a special opcode that included the extend. But then we had to add the new node to computeKnownBits and computeNumSignBits to process the extension portion. This patch instead removes all of that and adds a late peephole to detect the two extends. Reviewers: RKSimon, spatel Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D53449 llvm-svn: 344874
* fooCraig Topper2018-10-214-45/+62
| | | | llvm-svn: 344873
* [DAGCombiner] reduce insert+bitcast+extract vector ops to truncate (PR39016)Sanjay Patel2018-10-214-28/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | This is a late backend subset of the IR transform added with: D52439 We can confirm that the conversion to a 'trunc' is correct by running: $ opt -instcombine -data-layout="e" (assuming the IR transforms are correct; change "e" to "E" for big-endian) As discussed in PR39016: https://bugs.llvm.org/show_bug.cgi?id=39016 ...the pattern may emerge during legalization, so that's we are waiting for an insertelement to become a scalar_to_vector in the pattern matching here. The DAG allows for fun variations that are not possible in IR. Result types for extracts and scalar_to_vector don't necessarily match input types, so that means we have to be a bit more careful in the transform (see code comments). The tests show that we don't handle cases that require a shift (as we did in the IR version). I've left that as a potential follow-up because I'm not sure if that's a real concern at this late stage. Differential Revision: https://reviews.llvm.org/D53201 llvm-svn: 344872
* [clang-tidy] add IgnoreMacros option to readability-redundant-smartptr-getMiklos Vajna2018-10-216-1/+52
| | | | | | | | | | | | | And also enable it by default to be consistent with e.g. modernize-use-using. This helps e.g. when running this check on client code where the macro is provided by the system, so there is no easy way to modify it. Reviewed By: JonasToth Differential Revision: https://reviews.llvm.org/D53454 llvm-svn: 344871
* [analyzer][NFC] Fix inconsistencies in AnalyzerOptionsKristof Umann2018-10-213-62/+65
| | | | | | | | | | | | | I'm in the process of refactoring AnalyzerOptions. The main motivation behind here is to emit warnings if an invalid -analyzer-config option is given from the command line, and be able to list them all. This first NFC patch contains small modifications to make AnalyzerOptions.cpp a little more consistent. Differential Revision: https://reviews.llvm.org/D53274 llvm-svn: 344870
* Schedule Hot Cold Splitting pass after most optimization passesAditya Kumar2018-10-213-6/+298
| | | | | | | | | | | | | | | | Summary: In the new+old pass manager, hot cold splitting was schedule too early. Thanks to Vedant for pointing this out. Reviewers: sebpop, vsk Reviewed By: sebpop, vsk Subscribers: mehdi_amini, llvm-commits Differential Revision: https://reviews.llvm.org/D53437 llvm-svn: 344869
* [X86][AVX] Enable lowerVectorShuffleAsLanePermuteAndPermute v16i16/v32i8 ↵Simon Pilgrim2018-10-216-168/+69
| | | | | | unary shuffle lowering llvm-svn: 344868
* [X86] Only extract constant pool shuffle mask data with zero offsetsSimon Pilgrim2018-10-212-2/+2
| | | | | | D53306 exposes an issue where we sometimes use constant pool data from bigger vectors than the target shuffle mask. This should be safe to do, but we have to be certain that we're using the bottom most part of the vector as the shuffle mask decoders have no way to peek into subvectors with non-zero offsets. llvm-svn: 344867
* [WebAssembly] Change tabs to spaces in basic-assembly.sHeejin Ahn2018-10-211-2/+2
| | | | llvm-svn: 344866
* [AST, analyzer] Transform rvalue cast outputs to lvalues ↵Aleksei Sidorin2018-10-203-16/+87
| | | | | | | | | | | | | (fheinous-gnu-extensions) Despite the fact that cast expressions return rvalues, GCC still handles such outputs as lvalues when compiling inline assembler. In this commit, we are treating it by removing LValueToRValue casts inside GCCAsmStmt outputs. Differential Revision: https://reviews.llvm.org/D45416 llvm-svn: 344864
* [ORC] Add some more basic sanity tests for the LLJIT.Lang Hames2018-10-203-0/+25
| | | | | | | | | | | | minimal.ll contains a main function that returns zero, and single-function-call.ll contains a main function that calls a foo function that returns zero. These minimal tests can help to rule out some trivial JIT bugs when other tests fail. This commit also renames hello.ll to global-ctors-and-dtors.ll, which better reflects what it is actually testing. llvm-svn: 344863
* [X86] Add more intrinsics to match icc.Craig Topper2018-10-205-6/+192
| | | | | | | | | | This adds _mm_loadu_epi8, _mm256_loadu_epi8, _mm512_loadu_epi8 _mm_loadu_epi16, _mm256_loadu_epi16, _mm512_loadu_epi16 _mm_storeu_epi8, _mm256_storeu_epi8, _mm512_storeu_epi8 _mm_storeu_epi16, _mm256_storeu_epi16, _mm512_storeu_epi16 llvm-svn: 344862
* [X86] Add missing intrinsics to match icc.Craig Topper2018-10-204-64/+551
| | | | | | | | | | | | | | | | | | | | | | | | | | This adds _mm_and_epi32, _mm_and_epi64 _mm_andnot_epi32, _mm_andnot_epi64 _mm_or_epi32, _mm_or_epi64 _mm_xor_epi32, _mm_xor_epi64 _mm256_and_epi32, _mm256_and_epi64 _mm256_andnot_epi32, _mm256_andnot_epi64 _mm256_or_epi32, _mm256_or_epi64 _mm256_xor_epi32, _mm256_xor_epi64 _mm_loadu_epi32, _mm_loadu_epi64 _mm_load_epi32, _mm_load_epi64 _mm256_loadu_epi32, _mm256_loadu_epi64 _mm256_load_epi32, _mm256_load_epi64 _mm512_loadu_epi32, _mm512_loadu_epi64 _mm512_load_epi32, _mm512_load_epi64 _mm_storeu_epi32, _mm_storeu_epi64 _mm_store_epi32, _mm_load_epi64 _mm256_storeu_epi32, _mm256_storeu_epi64 _mm256_store_epi32, _mm256_load_epi64 _mm512_storeu_epi32, _mm512_storeu_epi64 _mm512_store_epi32,V _mm512_load_epi64 llvm-svn: 344861
* [InstCombine] add test for possible shuffle fold; NFCSanjay Patel2018-10-201-31/+51
| | | | llvm-svn: 344860
* Use llvm::{all,any,none}_of instead std::{all,any,none}_of. NFCFangrui Song2018-10-2010-35/+30
| | | | llvm-svn: 344859
* [clangd] Fix unqualified make_unique after r344850. NFCSam McCall2018-10-201-2/+2
| | | | llvm-svn: 344858
* [CostModel][X86] Add some initial extract/insert subvector shuffle cost testsSimon Pilgrim2018-10-202-0/+252
| | | | | | Just f64/i64 tests initially to demonstrate PR39368 llvm-svn: 344857
* Check that __MAC_OS_X_VERSION_MIN_REQUIRED is defined before checkingAkira Hatanaka2018-10-201-1/+3
| | | | | | whether it is too old. llvm-svn: 344856
* [InstCombine] use 'match' to simplify code; NFCSanjay Patel2018-10-201-59/+56
| | | | llvm-svn: 344855
* [InstCombine] make code more flexible with lambda; NFCSanjay Patel2018-10-201-4/+10
| | | | | | | | | | | | | | | | I couldn't tell from svn history when these checks were added, but it pre-dates the split of instcombine into its own directory at rL92459. The motivation for changing the check is partly shown by the code in PR34724: https://bugs.llvm.org/show_bug.cgi?id=34724 There are also existing regression tests for SLPVectorizer with sequences of extract+insert that are likely assumed to become shuffles by the vectorizer cost models. llvm-svn: 344854
* [InstCombine] add explanatory comment for strange vector logic; NFCSanjay Patel2018-10-201-0/+16
| | | | llvm-svn: 344852
* [clangd] Namespace style cleanup in cpp files. NFC.Sam McCall2018-10-2071-1139/+1089
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Standardize on the most common namespace setup in our *.cpp files: using namespace llvm; namespace clang { namespace clangd { void foo(StringRef) { ... } And remove redundant llvm:: qualifiers. (Except for cases like make_unique where this causes problems with std:: and ADL). This choice is pretty arbitrary, but some broad consistency is nice. This is going to conflict with everything. Sorry :-/ Squash the other configurations: A) using namespace llvm; using namespace clang; using namespace clangd; void clangd::foo(StringRef); This is in some of the older files. (It prevents accidentally defining a new function instead of one in the header file, for what that's worth). B) namespace clang { namespace clangd { void foo(llvm::StringRef) { ... } This is fine, but in practice the using directive often gets added over time. C) namespace clang { namespace clangd { using namespace llvm; // inside the namespace This was pretty common, but is a bit misleading: name lookup preferrs clang::clangd::foo > clang::foo > llvm:: foo (no matter where the using directive is). llvm-svn: 344850
* [SLPVectorizer][X86] Add mul/and/or/xor unrolled reduction testsSimon Pilgrim2018-10-201-7/+351
| | | | | | We miss arithmetic reduction for everything but Add/FAdd (I assume because that's the only cases which x86 has horizontal ops for.....) llvm-svn: 344849
* [SLPVectorizer] regenerate test checks; NFCSanjay Patel2018-10-201-30/+31
| | | | llvm-svn: 344848
* [NFC][Test commit] Fix typos in a commentAleksei Sidorin2018-10-201-2/+2
| | | | llvm-svn: 344847
* [CostModel][X86] Add integer vector reduction cost testsSimon Pilgrim2018-10-209-0/+2561
| | | | llvm-svn: 344846
* Fix MSVC "truncation from 'double' to 'float'" warning. NFCI.Simon Pilgrim2018-10-201-1/+1
| | | | llvm-svn: 344845
* Fix MSVC "not all control paths return a value" warning. NFCI.Simon Pilgrim2018-10-201-0/+1
| | | | llvm-svn: 344844
* Replace setFeature macro with lambda to fix MSVC "shift count negative or ↵Simon Pilgrim2018-10-201-10/+10
| | | | | | too big" warnings. NFCI. llvm-svn: 344843
* Add an addAbsolute static function to Writer.cppAlexander Richardson2018-10-201-8/+8
| | | | | | | | | | | | | | | | | Summary: SymbolTable::addAbsolute() was removed in rL344305. To me this is more readable than the lambda named `Add` and in our out-of-tree CHERI target we use addAbsolute() in another function. Reviewers: ruiu, espindola Reviewed By: ruiu Subscribers: kristina, emaste, llvm-commits Differential Revision: https://reviews.llvm.org/D53393 llvm-svn: 344842
* DebugInfo: Use base address specifiers more aggressivelyDavid Blaikie2018-10-202-12/+23
| | | | | | | | | | Using a base address specifier even for a single-element range is a size win for object files (7 words versus 8 words - more significant savings if the debug info is compressed (since it's 3 words of uncompressable reloc + 4 compressable words compared to 6 uncompressable reloc + 2 compressable words) - does trade off executable size increase though. llvm-svn: 344841
* [clang-query] Add option to print matcher expressionStephen Kelly2018-10-205-17/+42
| | | | | | | | | | | | | | Summary: This is useful if using clang-query -f with a file containing multiple matchers. Reviewers: aaron.ballman Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D52859 llvm-svn: 344840
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