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* Revert "[CodeGenPrepare] Move sign/zero extensions near loads using type ↵Reid Kleckner2014-12-175-571/+48
| | | | | | | | | promotion." This reverts commit r224351. It causes assertion failures when building ICU. llvm-svn: 224397
* Rename asan_allocator2.cc to asan_allocator.ccAlexey Samsonov2014-12-174-4/+4
| | | | llvm-svn: 224396
* [ASan] Introduce SetCanPoisonMemory() function.Alexey Samsonov2014-12-176-13/+31
| | | | | | | | | | SetCanPoisonMemory()/CanPoisonMemory() functions are now used instead of "poison_heap" flag to determine if ASan is allowed to poison the shadow memory. This allows to hot-patch this value in runtime (e.g. during ASan activation) without introducing a data race. llvm-svn: 224395
* PR21909: Don't try (and crash) to generate debug info for explicit ↵David Blaikie2014-12-162-1/+10
| | | | | | instantiations of explicit specializations. llvm-svn: 224394
* SelectionDAG switch lowering: use 'unsigned' to count destination popularityHans Wennborg2014-12-162-3/+3
| | | | | | | | | SwitchInst::getNumCases() returns unsinged, so using uint64_t to count cases seems unnecessary. Also fix a missing CHECK in the test case. llvm-svn: 224393
* Add the ability to tag one or more breakpoints with a name. TheseJim Ingham2014-12-1616-20/+713
| | | | | | | | | names can then be used in place of breakpoint id's or breakpoint id ranges in all the commands that operate on breakpoints. <rdar://problem/10103959> llvm-svn: 224392
* [Hexagon] Updating doubleword shift usages to new versions.Colin LeMahieu2014-12-164-31/+62
| | | | llvm-svn: 224391
* Add printing the LC_ENCRYPTION_INFO load command with llvm-objdump’s ↵Kevin Enderby2014-12-165-0/+44
| | | | | | -private-headers. llvm-svn: 224390
* Linker: Drop superseded subprogramsDuncan P. N. Exon Smith2014-12-163-0/+156
| | | | | | | | | | | | | When a function gets replaced by `ModuleLinker`, drop superseded subprograms. This ensures that the "first" subprogram pointing at a function is the same one that `!dbg` references point at. This is a stop-gap fix for PR21910. Notably, this fixes Release+Asserts bootstraps that are currently asserting out in `LexicalScopes::initialize()` due to the explicit instantiations in `lib/IR/Dominators.cpp` eventually getting replaced by -argpromotion. llvm-svn: 224389
* DR1684: a constexpr member function need not be a member of a literal class ↵Richard Smith2014-12-169-612/+1197
| | | | | | type. llvm-svn: 224388
* Fix test cases given Clang's improved location information.David Blaikie2014-12-162-2/+2
| | | | llvm-svn: 224387
* Try typo correction on all initialization arguments and be lessKaelyn Takata2014-12-162-7/+9
| | | | | | | | | pessimistic about when to do so. This also fixes PR21905 as the initialization argument was no longer viewed as being type dependent due to the TypoExpr being type-cast. llvm-svn: 224386
* DebugInfo: Generalize debug info location handlingDavid Blaikie2014-12-1617-195/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a more scalable (fixed in mostly one place, rather than many places that will need constant improvement/maintenance) solution to several commits I've made recently to increase source fidelity for subexpressions. This resetting had to be done at the DebugLoc level (not the SourceLocation level) to preserve scoping information (if the resetting was done with CGDebugInfo::EmitLocation, it would've caused the tail end of an expression's codegen to end up in a potentially different scope than the start, even though it was at the same source location). The drawback to this is that it might leave CGDebugInfo out of sync. Ideally CGDebugInfo shouldn't have a duplicate sense of the current SourceLocation, but for now it seems it does... - I don't think I'm going to tackle removing that just now. I expect this'll probably cause some more buildbot fallout & I'll investigate that as it comes up. Also these sort of improvements might be starting to show a weakness/bug in LLVM's line table handling: we don't correctly emit is_stmt for statements, we just put it on every line table entry. This means one statement split over multiple lines appears as multiple 'statements' and two statements on one line (without column info) are treated as one statement. I don't think we have any IR representation of statements that would help us distinguish these cases and identify the beginning of each statement - so that might be something we need to add (possibly to the lexical scope chain - a scope for each statement). This does cause some problems for GDB and possibly other DWARF consumers. llvm-svn: 224385
* fix typo, add spaces; NFCSanjay Patel2014-12-161-37/+37
| | | | llvm-svn: 224384
* [X86][SSE] Vector double -> float conversion memory folding (cvtpd2ps)Simon Pilgrim2014-12-162-0/+18
| | | | | | | | Added a missing memory folding relationship for the (V)CVTPD2PS instruction - we can safely fold these for stack reloads. Differential Revision: http://reviews.llvm.org/D6663 llvm-svn: 224383
* Make the assert a bit stronger.Rafael Espindola2014-12-161-2/+1
| | | | | | We should get no declarations in here. llvm-svn: 224382
* [Hexagon] Removing old XTYPE/BIT instructions and replacing usages.Colin LeMahieu2014-12-162-45/+17
| | | | llvm-svn: 224381
* Look at whether TransformTypos returned a different Expr instead of looking ↵Nick Lewycky2014-12-162-1/+15
| | | | | | | | at the number of uncorrected typos before and after. Correcting one typo may produce an expression with another TypoExpr in it, leading to matching counts even though a typo was corrected. Fixes PR21925! llvm-svn: 224380
* merge consecutive loads that are offset from a base addressSanjay Patel2014-12-163-15/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SelectionDAG::isConsecutiveLoad() was not detecting consecutive loads when the first load was offset from a base address. This patch recognizes that pattern and subtracts the offset before comparing the second load to see if it is consecutive. The codegen change in the new test case improves from: vmovsd 32(%rdi), %xmm0 vmovsd 48(%rdi), %xmm1 vmovhpd 56(%rdi), %xmm1, %xmm1 vmovhpd 40(%rdi), %xmm0, %xmm0 vinsertf128 $1, %xmm1, %ymm0, %ymm0 To: vmovups 32(%rdi), %ymm0 An existing test case is also improved from: vmovsd (%rdi), %xmm0 vmovsd 16(%rdi), %xmm1 vmovsd 24(%rdi), %xmm2 vunpcklpd %xmm2, %xmm0, %xmm0 ## xmm0 = xmm0[0],xmm2[0] vmovhpd 8(%rdi), %xmm1, %xmm3 To: vmovsd (%rdi), %xmm0 vmovsd 16(%rdi), %xmm1 vmovhpd 24(%rdi), %xmm0, %xmm0 vmovhpd 8(%rdi), %xmm1, %xmm1 This patch fixes PR21771 ( http://llvm.org/bugs/show_bug.cgi?id=21771 ). Differential Revision: http://reviews.llvm.org/D6642 llvm-svn: 224379
* Fix handling of invalid -O options.Rafael Espindola2014-12-163-8/+11
| | | | | | | | We were checking the value after truncating it to a bitfield. Thanks to Yunzhong Gao for noticing it. llvm-svn: 224378
* Fix typo in comment. NFC.Nick Lewycky2014-12-161-1/+1
| | | | llvm-svn: 224377
* Fix a bug in llvm-objdump’s -private-headers for the LC_VERSION_MIN_IPHONEOSKevin Enderby2014-12-162-1/+6
| | | | | | load command not getting printed. llvm-svn: 224376
* Add a new flag, -fspell-checking-limit=<number> to control how many times ↵Nick Lewycky2014-12-1611-463/+389
| | | | | | | | we'll do spell checking. Note that spell checking will change the produced AST, so we don't automatically change this value when someone sets -ferror-limit=. With this, merge test typo-correction-pt2.cpp into typo-correction.cpp. Remove Sema::UnqualifiedTyposCorrected, a cache of corrected typos. It would only cache typo corrections that didn't provide ValidateCandidate of which there were few left, and it had a bug when we had the same identifier spelled wrong twice. See the last two tests in typo-correction.cpp for cases this fires. llvm-svn: 224375
* [Hexagon] Adding tstbit/bitclr/bitset instructions.Colin LeMahieu2014-12-162-24/+111
| | | | llvm-svn: 224374
* Improve the performance of the libc++ std::map formatter. This is not the ↵Enrico Granata2014-12-161-87/+57
| | | | | | full solution to the slowness of this formatter, but it's a 5% improvement in our testcase performance, which I am not going to complain too hard about. llvm-svn: 224373
* [sanitizer] prevent function call merging for sanitizer-coverage callbacksKostya Serebryany2014-12-162-0/+11
| | | | llvm-svn: 224372
* Move -Wkeyword-macro into -pedantic, remove -Wreserved-id-macro.Nico Weber2014-12-165-71/+21
| | | | | | | | | | | | | | | | | | | As discussed on the post-commit review thread for r224012, -Wkeyword-macro fires mostly on headers trying to set up portable defines and doesn't find much bad stuff in practice. But [macro.names]p2 does disallow defining or undefining keywords, override and final, and alignas, so keep the warning but move it into -pedantic. -Wreserved-id-macro warns on #define __need_size_t which is more or less public api for glibc headers. Since this warning isn't motivated by a standard, remove it. (See also r223114 for a previous follow-up to r224012.) llvm-svn: 224371
* [asan] trying to fix Mac buildKostya Serebryany2014-12-161-1/+1
| | | | llvm-svn: 224370
* Put static local variables of inline functions in the function comdat.Rafael Espindola2014-12-162-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | The variable (and the GV) is only ever used if the function is. Putting it in the function's comdat make it easier for the linker to discard them. The motivating example is struct S { static const int x; }; // const int S::x = 42; inline const int *f() { static const int y = S::x; return &y; } const int *g() { return f(); } With S::x commented out, _ZZ1fvE1y is a variable with a guard variable that is initialized by f. With S::x present, _ZZ1fvE1y is a constant. llvm-svn: 224369
* Fix another use of PRIx32 that should have been PRIx64.Kevin Enderby2014-12-161-2/+2
| | | | llvm-svn: 224368
* [Hexagon] Adding bit count and twiddling instructions.Colin LeMahieu2014-12-162-0/+129
| | | | llvm-svn: 224367
* Fix Win build after r224353: void function returning zero.Hans Wennborg2014-12-161-1/+1
| | | | llvm-svn: 224366
* [Hexagon] Adding asr/lsr/asl reg/imm, asl with saturation, asr with ↵Colin LeMahieu2014-12-164-0/+100
| | | | | | rounding. Doubleword abs/neg/not. Interleave and deinterleave instructions. llvm-svn: 224365
* Fixes wrong -march=aarch64 option in compiler-rtRenato Golin2014-12-161-1/+1
| | | | llvm-svn: 224362
* [dsymutil] Pass the verbosity flag down to the processing. NFC for now.Frederic Riss2014-12-164-6/+9
| | | | llvm-svn: 224361
* [dsymutil] Avoid calling getStringTableData() for each symbol. NFC.Frederic Riss2014-12-161-2/+3
| | | | llvm-svn: 224360
* x86-32: PUSHF/POPF use/def EFLAGSJF Bastien2014-12-1615-35/+41
| | | | | | | | | | | | | | Summary: As a side-quest for D6629 jvoung pointed out that I should use -verify-machineinstrs and this found a bug in x86-32's handling of EFLAGS for PUSHF/POPF. This patch fixes the use/def, and adds -verify-machineinstrs to all x86 tests which contain 'EFLAGS'. One exception: this patch leaves inline-asm-fpstack.ll as-is because it fails -verify-machineinstrs in a way unrelated to EFLAGS. This patch also modifies cmpxchg-clobber-flags.ll along the lines of what D6629 already does by also testing i386. Test Plan: ninja check Reviewers: t.p.northover, jvoung Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6687 llvm-svn: 224359
* Consider calls from implict host device functions as valid in SemaCUDA.Jacques Pienaar2014-12-165-17/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | In SemaCUDA all implicit functions were considered host device, this led to errors such as the following code snippet failing to compile: struct Copyable { const Copyable& operator=(const Copyable& x) { return *this; } }; struct Simple { Copyable b; }; void foo() { Simple a, b; a = b; } Above the implicit copy assignment operator was inferred as host device but there was only a host assignment copy defined which is an error in device compilation mode. Differential Revision: http://reviews.llvm.org/D6565 llvm-svn: 224358
* Use the object's package to mangle method names, rather than the receiver's ↵Peter Collingbourne2014-12-164-8/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | package If we use the receiver's package, we can end up with identical manglings for different functions. Consider: package p type U struct{} func (U) f() package q import "p" type T struct { p.U } func (T) f() The method set of *T has two synthetic methods named (*T).f(); one forwards to (T).f(), and the other to (U).f(). Previously, we were distinguishing them by the receiver's package, and in this case because both methods have the same receiver, they received the same name. The methods are correctly distinguished by the package owning the identifier "f", which is available via f.Object().Pkg(). Differential Revision: http://reviews.llvm.org/D6673 llvm-svn: 224357
* Use CastInst::castIsValid to simplify the verifier.Rafael Espindola2014-12-161-47/+9
| | | | | | Also delete a dead member variable. llvm-svn: 224356
* NVPTX: Remove duplicate of AsmPrinter::lowerConstantMatt Arsenault2014-12-162-163/+2
| | | | llvm-svn: 224355
* Move lowerConstant to AsmPrinterMatt Arsenault2014-12-162-25/+24
| | | | | | | This was a static function before, and NVPTX duplicated it because it wasn't exposed. llvm-svn: 224354
* [asan] new flag: hard_rss_limit_mbKostya Serebryany2014-12-1613-18/+138
| | | | llvm-svn: 224353
* In C++, it's #include not #importEnrico Granata2014-12-161-1/+1
| | | | llvm-svn: 224352
* [CodeGenPrepare] Move sign/zero extensions near loads using type promotion.Quentin Colombet2014-12-165-48/+571
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch extends the optimization in CodeGenPrepare that moves a sign/zero extension near a load when the target can combine them. The optimization may promote any operations between the extension and the load to make that possible. Although this optimization may be beneficial for all targets, in particular AArch64, this is enabled for X86 only as I have not benchmarked it for other targets yet. ** Context ** Most targets feature extended loads, i.e., loads that perform a zero or sign extension for free. In that context it is interesting to expose such pattern in CodeGenPrepare so that the instruction selection pass can form such loads. Sometimes, this pattern is blocked because of instructions between the load and the extension. When those instructions are promotable to the extended type, we can expose this pattern. ** Motivating Example ** Let us consider an example: define void @foo(i8* %addr1, i32* %addr2, i8 %a, i32 %b) { %ld = load i8* %addr1 %zextld = zext i8 %ld to i32 %ld2 = load i32* %addr2 %add = add nsw i32 %ld2, %zextld %sextadd = sext i32 %add to i64 %zexta = zext i8 %a to i32 %addza = add nsw i32 %zexta, %zextld %sextaddza = sext i32 %addza to i64 %addb = add nsw i32 %b, %zextld %sextaddb = sext i32 %addb to i64 call void @dummy(i64 %sextadd, i64 %sextaddza, i64 %sextaddb) ret void } As it is, this IR generates the following assembly on x86_64: [...] movzbl (%rdi), %eax # zero-extended load movl (%rsi), %es # plain load addl %eax, %esi # 32-bit add movslq %esi, %rdi # sign extend the result of add movzbl %dl, %edx # zero extend the first argument addl %eax, %edx # 32-bit add movslq %edx, %rsi # sign extend the result of add addl %eax, %ecx # 32-bit add movslq %ecx, %rdx # sign extend the result of add [...] The throughput of this sequence is 7.45 cycles on Ivy Bridge according to IACA. Now, by promoting the additions to form more extended loads we would generate: [...] movzbl (%rdi), %eax # zero-extended load movslq (%rsi), %rdi # sign-extended load addq %rax, %rdi # 64-bit add movzbl %dl, %esi # zero extend the first argument addq %rax, %rsi # 64-bit add movslq %ecx, %rdx # sign extend the second argument addq %rax, %rdx # 64-bit add [...] The throughput of this sequence is 6.15 cycles on Ivy Bridge according to IACA. This kind of sequences happen a lot on code using 32-bit indexes on 64-bit architectures. Note: The throughput numbers are similar on Sandy Bridge and Haswell. ** Proposed Solution ** To avoid the penalty of all these sign/zero extensions, we merge them in the loads at the beginning of the chain of computation by promoting all the chain of computation on the extended type. The promotion is done if and only if we do not introduce new extensions, i.e., if we do not degrade the code quality. To achieve this, we extend the existing “move ext to load” optimization with the promotion mechanism introduced to match larger patterns for addressing mode (r200947). The idea of this extension is to perform the following transformation: ext(promotableInst1(...(promotableInstN(load)))) => promotedInst1(...(promotedInstN(ext(load)))) The promotion mechanism in that optimization is enabled by a new TargetLowering switch, which is off by default. In other words, by default, the optimization performs the “move ext to load” optimization as it was before this patch. ** Performance ** Configuration: x86_64: Ivy Bridge fixed at 2900MHz running OS X 10.10. Tested Optimization Levels: O3/Os Tests: llvm-testsuite + externals. Results: - No regression beside noise. - Improvements: CINT2006/473.astar: ~2% Benchmarks/PAQ8p: ~2% Misc/perlin: ~3% The results are consistent for both O3 and Os. <rdar://problem/18310086> llvm-svn: 224351
* Fix the arm build bots for a test that was added. A printing routine was ↵Kevin Enderby2014-12-161-2/+2
| | | | | | | | incorrectly using PRIx32 when it should have been using PRIx64 for the value that was passed as uint64_t . llvm-svn: 224350
* [AVX512] Enable integer arithmetic lowering for AVX512BW/VL subsets.Robert Khasanov2014-12-165-1/+605
| | | | | | Added lowering tests. llvm-svn: 224349
* On behalf of Matthew Wahab:Evgeny Astigeevich2014-12-161-1/+7
| | | | | | | | | | | | | | | | An instruction alias defined with InstAlias and an optional operand in the middle of the AsmString field, "..${a} <operands>", would get the final "}" printed in the instruction disassembly. This wouldn't happen if the optional operand appeared as the last item in the AsmString which is how the current backends avoided the problem. There don't appear to be any tests for this part of Tablegen but it passes the pre-commit tests. Manually tested the change by enabling the generic alias printer in the ARM backend and checking the output. Differential Revision: http://reviews.llvm.org/D6529 llvm-svn: 224348
* [MC] Reset the MCInst in the matcher function before adding opcode/operands.Ahmed Bougacha2014-12-162-0/+4
| | | | | | | | | | | | | | | | | | On X86, the Intel asm parser tries to match all memory operand sizes when none is explicitly specified. For LEA, which doesn't really have a memory operand (just a pointer one), this results in multiple successful matches, one for each memory size. There's no error because it's same opcode, so really, it's just one match. However, the tablegen'd matcher function adds opcode/operands to the passed MCInst, and this results in multiple duplicated operands. This commit clears the MCInst in the tablegen'd matcher function. We sometimes clear it when the match failed, so there's no expectation of keeping the previous content anyway. Differential Revision: http://reviews.llvm.org/D6670 llvm-svn: 224347
* [Hexagon] Adding absolute value, and negate with saturationColin LeMahieu2014-12-163-8/+38
| | | | llvm-svn: 224346
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