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-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 1bdd6fead9d..a08ac33065d 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -24946,7 +24946,7 @@ static SDValue VectorZextCombine(SDNode *N, SelectionDAG &DAG,
unsigned ResSize = N1.getValueType().getScalarSizeInBits();
// Make sure the splat matches the mask we expect
if (SplatBitSize > ResSize ||
- (SplatValue + 1).exactLogBase2() != SrcSize)
+ (SplatValue + 1).exactLogBase2() != (int)SrcSize)
return SDValue();
// Make sure the input and output size make sense
@@ -24966,7 +24966,7 @@ static SDValue VectorZextCombine(SDNode *N, SelectionDAG &DAG,
break;
}
} else {
- if (Shuffle->getMaskElt(i) != (i / ZextRatio)) {
+ if (Shuffle->getMaskElt(i) != (int)(i / ZextRatio)) {
// Expected element number
IsZext = false;
break;
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