diff options
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/docs/LangRef.rst | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/XCore/XCoreTargetMachine.cpp | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst index 483bea2a9a2..2faa15692bb 100644 --- a/llvm/docs/LangRef.rst +++ b/llvm/docs/LangRef.rst @@ -1147,7 +1147,7 @@ specifications are given in this list: - ``f128:128:128`` - quad is 128-bit aligned - ``v64:64:64`` - 64-bit vector is 64-bit aligned - ``v128:128:128`` - 128-bit vector is 128-bit aligned -- ``a0:0:64`` - aggregates are 64-bit aligned +- ``a:0:64`` - aggregates are 64-bit aligned When LLVM is determining the alignment for a given type, it uses the following rules: diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp index bb950a0ea75..53daa16aa93 100644 --- a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp +++ b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp @@ -73,7 +73,7 @@ HexagonTargetMachine::HexagonTargetMachine(const Target &T, StringRef TT, : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), DL("e-p:32:32:32-" "i64:64:64-i32:32:32-i16:16:16-i1:32:32-" - "f64:64:64-f32:32:32-a0:0-n32") , + "f64:64:64-f32:32:32-a:0-n32") , Subtarget(TT, CPU, FS), InstrInfo(Subtarget), TLInfo(*this), TSInfo(*this), FrameLowering(Subtarget), diff --git a/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp b/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp index dee92e960c5..87c09b557c8 100644 --- a/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp +++ b/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp @@ -31,7 +31,7 @@ SystemZTargetMachine::SystemZTargetMachine(const Target &T, StringRef TT, // so that we can refer to it using LARL. We don't have any special // requirements for stack variables though. DL("E-p:64:64:64-i1:8:16-i8:8:16-i16:16-i32:32-i64:64" - "-f32:32-f64:64-f128:64-a0:8:16-n32:64"), + "-f32:32-f64:64-f128:64-a:8:16-n32:64"), InstrInfo(*this), TLInfo(*this), TSInfo(*this), FrameLowering(*this, Subtarget) { initAsmInfo(); diff --git a/llvm/lib/Target/XCore/XCoreTargetMachine.cpp b/llvm/lib/Target/XCore/XCoreTargetMachine.cpp index 9ae0b860dff..08fe55d2ae3 100644 --- a/llvm/lib/Target/XCore/XCoreTargetMachine.cpp +++ b/llvm/lib/Target/XCore/XCoreTargetMachine.cpp @@ -27,7 +27,7 @@ XCoreTargetMachine::XCoreTargetMachine(const Target &T, StringRef TT, CodeGenOpt::Level OL) : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), Subtarget(TT, CPU, FS), - DL("e-p:32:32:32-a0:0:32-f32:32:32-f64:32:32-i1:8:32-i8:8:32-" + DL("e-p:32:32:32-a:0:32-f32:32:32-f64:32:32-i1:8:32-i8:8:32-" "i16:16:32-i32:32:32-i64:32:32-n32"), InstrInfo(), FrameLowering(Subtarget), |
