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-rw-r--r--llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp8
-rw-r--r--llvm/test/CodeGen/SystemZ/isel-debug.ll2
2 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp b/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
index 5edfdf645e5..c8474b15b18 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
@@ -71,19 +71,19 @@ struct SystemZAddressingMode {
// True if the address can (and must) include ADJDYNALLOC.
bool isDynAlloc() { return Form == FormBDXDynAlloc; }
- void dump() {
+ void dump(const llvm::SelectionDAG *DAG) {
errs() << "SystemZAddressingMode " << this << '\n';
errs() << " Base ";
if (Base.getNode())
- Base.getNode()->dump();
+ Base.getNode()->dump(DAG);
else
errs() << "null\n";
if (hasIndexField()) {
errs() << " Index ";
if (Index.getNode())
- Index.getNode()->dump();
+ Index.getNode()->dump(DAG);
else
errs() << "null\n";
}
@@ -589,7 +589,7 @@ bool SystemZDAGToDAGISel::selectAddress(SDValue Addr,
if (AM.isDynAlloc() && !AM.IncludesDynAlloc)
return false;
- LLVM_DEBUG(AM.dump());
+ LLVM_DEBUG(AM.dump(CurDAG));
return true;
}
diff --git a/llvm/test/CodeGen/SystemZ/isel-debug.ll b/llvm/test/CodeGen/SystemZ/isel-debug.ll
index cf5370cbec6..0e48210e9b6 100644
--- a/llvm/test/CodeGen/SystemZ/isel-debug.ll
+++ b/llvm/test/CodeGen/SystemZ/isel-debug.ll
@@ -5,7 +5,7 @@
;
; Check that some debug output is printed without problems.
; CHECK: SystemZAddressingMode
-; CHECK: Base
+; CHECK: Base t5: i64,ch = load<(load 8 from %ir.0)>
; CHECK: Index
; CHECK: Disp
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