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-rw-r--r--llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp4
-rw-r--r--llvm/test/CodeGen/ARM/load_store_multiple.ll4
2 files changed, 5 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
index 1c64e3d1a1c..f1def9822c2 100644
--- a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
+++ b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
@@ -1469,7 +1469,9 @@ bool ARMExpandPseudo::ExpandMI(MachineBasicBlock &MBB,
unsigned SrcReg = MI.getOperand(OpIdx++).getReg();
// Copy the destination register.
- MIB.add(MI.getOperand(OpIdx++));
+ MachineOperand Dst(MI.getOperand(OpIdx++));
+ Dst.setIsRenamable(false);
+ MIB.add(Dst);
// Copy the predicate operands.
MIB.add(MI.getOperand(OpIdx++));
diff --git a/llvm/test/CodeGen/ARM/load_store_multiple.ll b/llvm/test/CodeGen/ARM/load_store_multiple.ll
index 5ea1f8cf6ff..a636a8d12b2 100644
--- a/llvm/test/CodeGen/ARM/load_store_multiple.ll
+++ b/llvm/test/CodeGen/ARM/load_store_multiple.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=armv7-eabi -mattr=+neon %s -o - | FileCheck %s --check-prefix=CHECK-LE
-; RUN: llc -mtriple=armv7eb-eabi -mattr=+neon %s -o - | FileCheck %s --check-prefix=CHECK-BE
+; RUN: llc -verify-machineinstrs -mtriple=armv7-eabi -mattr=+neon %s -o - | FileCheck %s --check-prefix=CHECK-LE
+; RUN: llc -verify-machineinstrs -mtriple=armv7eb-eabi -mattr=+neon %s -o - | FileCheck %s --check-prefix=CHECK-BE
define void @ld_st_vec_i8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
;CHECK-LE-LABEL: ld_st_vec_i8:
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