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-rw-r--r--llvm/include/llvm/CodeGen/TargetPassConfig.h3
-rw-r--r--llvm/include/llvm/Target/TargetOptions.h6
-rw-r--r--llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp2
-rw-r--r--llvm/lib/CodeGen/TargetPassConfig.cpp10
-rw-r--r--llvm/lib/Target/TargetMachine.cpp9
5 files changed, 17 insertions, 13 deletions
diff --git a/llvm/include/llvm/CodeGen/TargetPassConfig.h b/llvm/include/llvm/CodeGen/TargetPassConfig.h
index 785d7e01edb..9309655a972 100644
--- a/llvm/include/llvm/CodeGen/TargetPassConfig.h
+++ b/llvm/include/llvm/CodeGen/TargetPassConfig.h
@@ -16,11 +16,8 @@
#include "llvm/Pass.h"
#include "llvm/Support/CodeGen.h"
-#include "llvm/Support/CommandLine.h"
#include <string>
-extern llvm::cl::opt<bool> UseIPRA;
-
namespace llvm {
class PassConfigImpl;
diff --git a/llvm/include/llvm/Target/TargetOptions.h b/llvm/include/llvm/Target/TargetOptions.h
index 1de8a5baacc..b7b677ba94e 100644
--- a/llvm/include/llvm/Target/TargetOptions.h
+++ b/llvm/include/llvm/Target/TargetOptions.h
@@ -100,7 +100,8 @@ namespace llvm {
DisableIntegratedAS(false), CompressDebugSections(false),
RelaxELFRelocations(false), FunctionSections(false),
DataSections(false), UniqueSectionNames(true), TrapUnreachable(false),
- EmulatedTLS(false), FloatABIType(FloatABI::Default),
+ EmulatedTLS(false), EnableIPRA(false),
+ FloatABIType(FloatABI::Default),
AllowFPOpFusion(FPOpFusion::Standard), Reciprocals(TargetRecip()),
JTType(JumpTable::Single), ThreadModel(ThreadModel::POSIX),
EABIVersion(EABI::Default), DebuggerTuning(DebuggerKind::Default),
@@ -207,6 +208,9 @@ namespace llvm {
/// function in the runtime library..
unsigned EmulatedTLS : 1;
+ /// This flag enables InterProcedural Register Allocation (IPRA).
+ unsigned EnableIPRA : 1;
+
/// FloatABIType - This setting is set by -float-abi=xxx option is specfied
/// on the command line. This setting may either be Default, Soft, or Hard.
/// Default selects the target's default behavior. Soft selects the ABI for
diff --git a/llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp b/llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
index bb99166edd7..cac7e63af32 100644
--- a/llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
+++ b/llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
@@ -69,7 +69,7 @@ void TargetFrameLowering::determineCalleeSaves(MachineFunction &MF,
// When interprocedural register allocation is enabled caller saved registers
// are preferred over callee saved registers.
- if (UseIPRA && isSafeForNoCSROpt(MF.getFunction()))
+ if (MF.getTarget().Options.EnableIPRA && isSafeForNoCSROpt(MF.getFunction()))
return;
// Get the callee saved register list...
diff --git a/llvm/lib/CodeGen/TargetPassConfig.cpp b/llvm/lib/CodeGen/TargetPassConfig.cpp
index dccdc52c75a..fcb375e8687 100644
--- a/llvm/lib/CodeGen/TargetPassConfig.cpp
+++ b/llvm/lib/CodeGen/TargetPassConfig.cpp
@@ -124,10 +124,6 @@ static cl::opt<CFLAAType> UseCFLAA(
"Enable both variants of CFL-AA"),
clEnumValEnd));
-cl::opt<bool> UseIPRA("enable-ipra", cl::init(false), cl::Hidden,
- cl::desc("Enable interprocedural register allocation "
- "to reduce load/store at procedure calls."));
-
/// Allow standard passes to be disabled by command line options. This supports
/// simple binary flags that either suppress the pass or do nothing.
/// i.e. -disable-mypass=false has no effect.
@@ -522,7 +518,7 @@ void TargetPassConfig::addISelPrepare() {
addPreISel();
// Force codegen to run according to the callgraph.
- if (UseIPRA)
+ if (TM->Options.EnableIPRA)
addPass(new DummyCGSCCPass);
// Add both the safe stack and the stack protection passes: each of them will
@@ -561,7 +557,7 @@ void TargetPassConfig::addISelPrepare() {
void TargetPassConfig::addMachinePasses() {
AddingMachinePasses = true;
- if (UseIPRA)
+ if (TM->Options.EnableIPRA)
addPass(createRegUsageInfoPropPass());
// Insert a machine instr printer pass after the specified pass.
@@ -649,7 +645,7 @@ void TargetPassConfig::addMachinePasses() {
addPreEmitPass();
- if (UseIPRA)
+ if (TM->Options.EnableIPRA)
// Collect register usage information and produce a register mask of
// clobbered registers, to be used to optimize call sites.
addPass(createRegUsageInfoCollector());
diff --git a/llvm/lib/Target/TargetMachine.cpp b/llvm/lib/Target/TargetMachine.cpp
index ed2f4fef0f0..82c68505c4e 100644
--- a/llvm/lib/Target/TargetMachine.cpp
+++ b/llvm/lib/Target/TargetMachine.cpp
@@ -31,6 +31,10 @@
#include "llvm/Target/TargetSubtargetInfo.h"
using namespace llvm;
+cl::opt<bool> EnableIPRA("enable-ipra", cl::init(false), cl::Hidden,
+ cl::desc("Enable interprocedural register allocation "
+ "to reduce load/store at procedure calls."));
+
//---------------------------------------------------------------------------
// TargetMachine Class
//
@@ -40,7 +44,10 @@ TargetMachine::TargetMachine(const Target &T, StringRef DataLayoutString,
const TargetOptions &Options)
: TheTarget(T), DL(DataLayoutString), TargetTriple(TT), TargetCPU(CPU),
TargetFS(FS), AsmInfo(nullptr), MRI(nullptr), MII(nullptr), STI(nullptr),
- RequireStructuredCFG(false), Options(Options) {}
+ RequireStructuredCFG(false), Options(Options) {
+ if (EnableIPRA.getNumOccurrences())
+ this->Options.EnableIPRA = EnableIPRA;
+}
TargetMachine::~TargetMachine() {
delete AsmInfo;
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