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-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 76284726f8a..aa9da930639 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -13552,7 +13552,7 @@ static SDValue LowerTruncateVecI1(SDValue Op, SelectionDAG &DAG,
SDValue In = Op.getOperand(0);
MVT InVT = In.getSimpleValueType();
- assert(VT.getVectorElementType() == MVT::i1 && "Unexected vector type.");
+ assert(VT.getVectorElementType() == MVT::i1 && "Unexpected vector type.");
// Shift LSB to MSB and use VPMOVB2M - SKX.
unsigned ShiftInx = InVT.getScalarSizeInBits() - 1;
@@ -13585,7 +13585,7 @@ static SDValue LowerTruncateVecI1(SDValue Op, SelectionDAG &DAG,
if (InVT.getSizeInBits() < 512 &&
(InVT.getScalarType() == MVT::i8 || InVT.getScalarType() == MVT::i16 ||
!Subtarget->hasVLX())) {
- assert((NumElts == 8 || NumElts == 16) && "Unexected vector type.");
+ assert((NumElts == 8 || NumElts == 16) && "Unexpected vector type.");
// TESTD/Q should be used (if BW supported we use CVT2MASK above),
// so vector should be extended to packed dword/qword.
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