diff options
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/Sparc/SparcInstrInfo.td | 4 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/Sparc/sparc-v9.txt | 4 | ||||
| -rw-r--r-- | llvm/test/MC/Sparc/sparcv9-instructions.s | 5 |
3 files changed, 11 insertions, 2 deletions
diff --git a/llvm/lib/Target/Sparc/SparcInstrInfo.td b/llvm/lib/Target/Sparc/SparcInstrInfo.td index 3b9e048ea8b..51b71f49144 100644 --- a/llvm/lib/Target/Sparc/SparcInstrInfo.td +++ b/llvm/lib/Target/Sparc/SparcInstrInfo.td @@ -1221,8 +1221,8 @@ let Predicates = [HasV9] in { // the top 32-bits before using it. To do this clearing, we use a SRLri X,0. let rs1 = 0 in def POPCrr : F3_1<2, 0b101110, - (outs IntRegs:$dst), (ins IntRegs:$src), - "popc $src, $dst", []>, Requires<[HasV9]>; + (outs IntRegs:$rd), (ins IntRegs:$rs2), + "popc $rs2, $rd", []>, Requires<[HasV9]>; def : Pat<(ctpop i32:$src), (POPCrr (SRLri $src, 0))>; diff --git a/llvm/test/MC/Disassembler/Sparc/sparc-v9.txt b/llvm/test/MC/Disassembler/Sparc/sparc-v9.txt new file mode 100644 index 00000000000..b8ca01ce04e --- /dev/null +++ b/llvm/test/MC/Disassembler/Sparc/sparc-v9.txt @@ -0,0 +1,4 @@ +# RUN: llvm-mc --disassemble %s -triple=sparcv9-unknown-linux | FileCheck %s + +# CHECK: popc %g1, %g2 +0x85 0x70 0x00 0x01 diff --git a/llvm/test/MC/Sparc/sparcv9-instructions.s b/llvm/test/MC/Sparc/sparcv9-instructions.s index 37f4c8b2f6b..e2cb87e0630 100644 --- a/llvm/test/MC/Sparc/sparcv9-instructions.s +++ b/llvm/test/MC/Sparc/sparcv9-instructions.s @@ -21,3 +21,8 @@ ! V9: subxcc %g1, %g2, %g3 ! encoding: [0x86,0xe0,0x40,0x02] subccc %g1, %g2, %g3 + ! V8: error: instruction requires a CPU feature not currently enabled + ! V8-NEXT: popc %g1, %g2 + ! V9: popc %g1, %g2 ! encoding: [0x85,0x70,0x00,0x01] + popc %g1, %g2 + |
