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-rw-r--r--llvm/include/llvm/Target/Target.td4
-rw-r--r--llvm/utils/TableGen/AsmMatcherEmitter.cpp2
-rw-r--r--llvm/utils/TableGen/CodeGenInstruction.cpp4
-rw-r--r--llvm/utils/TableGen/CodeGenInstruction.h2
-rw-r--r--llvm/utils/TableGen/CodeGenTarget.cpp9
5 files changed, 6 insertions, 15 deletions
diff --git a/llvm/include/llvm/Target/Target.td b/llvm/include/llvm/Target/Target.td
index 57485602d7b..5aabc9d639a 100644
--- a/llvm/include/llvm/Target/Target.td
+++ b/llvm/include/llvm/Target/Target.td
@@ -593,10 +593,6 @@ class AsmWriter {
// name.
string AsmWriterClassName = "AsmPrinter";
- // InstFormatName - AsmWriters can specify the name of the format string to
- // print instructions with.
- string InstFormatName = "AsmString";
-
// Variant - AsmWriters can be of multiple different variants. Variants are
// used to support targets that need to emit assembly code in ways that are
// mostly the same for different targets, but have minor differences in
diff --git a/llvm/utils/TableGen/AsmMatcherEmitter.cpp b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
index c047a5d9936..37a8c8f79bb 100644
--- a/llvm/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
@@ -945,7 +945,7 @@ void AsmMatcherInfo::BuildInfo() {
Instructions.push_back(II.take());
}
-
+
// Build info for the register classes.
BuildRegisterClasses(SingletonRegisters);
diff --git a/llvm/utils/TableGen/CodeGenInstruction.cpp b/llvm/utils/TableGen/CodeGenInstruction.cpp
index f7b45e243a4..41a27cea3dd 100644
--- a/llvm/utils/TableGen/CodeGenInstruction.cpp
+++ b/llvm/utils/TableGen/CodeGenInstruction.cpp
@@ -95,9 +95,9 @@ static void ParseConstraints(const std::string &CStr, CodeGenInstruction *I) {
}
}
-CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
- : TheDef(R), AsmString(AsmStr) {
+CodeGenInstruction::CodeGenInstruction(Record *R) : TheDef(R) {
Namespace = R->getValueAsString("Namespace");
+ AsmString = R->getValueAsString("AsmString");
isReturn = R->getValueAsBit("isReturn");
isBranch = R->getValueAsBit("isBranch");
diff --git a/llvm/utils/TableGen/CodeGenInstruction.h b/llvm/utils/TableGen/CodeGenInstruction.h
index 93d1ce1ddfd..33701ec0110 100644
--- a/llvm/utils/TableGen/CodeGenInstruction.h
+++ b/llvm/utils/TableGen/CodeGenInstruction.h
@@ -185,7 +185,7 @@ namespace llvm {
return false;
}
- CodeGenInstruction(Record *R, const std::string &AsmStr);
+ CodeGenInstruction(Record *R);
/// getOperandNamed - Return the index of the operand with the specified
/// non-empty name. If the instruction does not have an operand with the
diff --git a/llvm/utils/TableGen/CodeGenTarget.cpp b/llvm/utils/TableGen/CodeGenTarget.cpp
index c9b6fc2d26a..7a1c4f7b50c 100644
--- a/llvm/utils/TableGen/CodeGenTarget.cpp
+++ b/llvm/utils/TableGen/CodeGenTarget.cpp
@@ -295,13 +295,8 @@ void CodeGenTarget::ReadInstructions() const {
throw std::string("No 'Instruction' subclasses defined!");
// Parse the instructions defined in the .td file.
- std::string InstFormatName =
- getAsmWriter()->getValueAsString("InstFormatName");
-
- for (unsigned i = 0, e = Insts.size(); i != e; ++i) {
- std::string AsmStr = Insts[i]->getValueAsString(InstFormatName);
- Instructions[Insts[i]] = new CodeGenInstruction(Insts[i], AsmStr);
- }
+ for (unsigned i = 0, e = Insts.size(); i != e; ++i)
+ Instructions[Insts[i]] = new CodeGenInstruction(Insts[i]);
}
static const CodeGenInstruction *
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