diff options
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsAsmPrinter.cpp | 22 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsAsmPrinter.h | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsInstrInfo.td | 11 | 
3 files changed, 21 insertions, 16 deletions
diff --git a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp index 74365b81493..95114363c95 100644 --- a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp +++ b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp @@ -359,17 +359,7 @@ void MipsAsmPrinter::printUnsignedImm(const MachineInstr *MI, int opNum,  }  void MipsAsmPrinter:: -printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O, -                const char *Modifier) { -  // when using stack locations for not load/store instructions -  // print the same way as all normal 3 operand instructions. -  if (Modifier && !strcmp(Modifier, "stackloc")) { -    printOperand(MI, opNum, O); -    O << ", "; -    printOperand(MI, opNum+1, O); -    return; -  } - +printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O) {    // Load/Store memory operands -- imm($reg)    // If PIC target the target is loaded as the    // pattern lw $25,%call16($28) @@ -380,6 +370,16 @@ printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O,  }  void MipsAsmPrinter:: +printMemOperandEA(const MachineInstr *MI, int opNum, raw_ostream &O) { +  // when using stack locations for not load/store instructions +  // print the same way as all normal 3 operand instructions. +  printOperand(MI, opNum, O); +  O << ", "; +  printOperand(MI, opNum+1, O); +  return; +} + +void MipsAsmPrinter::  printFCCOperand(const MachineInstr *MI, int opNum, raw_ostream &O,                  const char *Modifier) {    const MachineOperand& MO = MI->getOperand(opNum); diff --git a/llvm/lib/Target/Mips/MipsAsmPrinter.h b/llvm/lib/Target/Mips/MipsAsmPrinter.h index 71b267c8e37..a73fcc1b3d3 100644 --- a/llvm/lib/Target/Mips/MipsAsmPrinter.h +++ b/llvm/lib/Target/Mips/MipsAsmPrinter.h @@ -61,8 +61,8 @@ public:                               raw_ostream &O);    void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O);    void printUnsignedImm(const MachineInstr *MI, int opNum, raw_ostream &O); -  void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O, -                       const char *Modifier = 0); +  void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O); +  void printMemOperandEA(const MachineInstr *MI, int opNum, raw_ostream &O);    void printFCCOperand(const MachineInstr *MI, int opNum, raw_ostream &O,                         const char *Modifier = 0);    void EmitStartOfAsmFile(Module &M); diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.td b/llvm/lib/Target/Mips/MipsInstrInfo.td index d0d820c15dc..ef26bb54791 100644 --- a/llvm/lib/Target/Mips/MipsInstrInfo.td +++ b/llvm/lib/Target/Mips/MipsInstrInfo.td @@ -137,6 +137,11 @@ def mem : Operand<i32> {    let MIOperandInfo = (ops CPURegs, simm16);  } +def mem_ea : Operand<i32> { +  let PrintMethod = "printMemOperandEA"; +  let MIOperandInfo = (ops CPURegs, simm16); +} +  // Transformation Function - get the lower 16 bits.  def LO16 : SDNodeXForm<imm, [{    return getI32Imm((unsigned)N->getZExtValue() & 0xFFFF); @@ -351,7 +356,7 @@ class MoveToLOHI<bits<6> func, string instr_asm>:       !strconcat(instr_asm, "\t$src"), [], IIHiLo>;  class EffectiveAddress<string instr_asm> : -  FI<0x09, (outs CPURegs:$dst), (ins mem:$addr), +  FI<0x09, (outs CPURegs:$dst), (ins mem_ea:$addr),       instr_asm, [(set CPURegs:$dst, addr:$addr)], IIAlu>;  // Count Leading Ones/Zeros in Word @@ -680,13 +685,13 @@ let addr=0 in  // instructions. The same not happens for stack address copies, so an  // add op with mem ComplexPattern is used and the stack address copy  // can be matched. It's similar to Sparc LEA_ADDRi -def LEA_ADDiu : EffectiveAddress<"addiu\t$dst, ${addr:stackloc}">; +def LEA_ADDiu : EffectiveAddress<"addiu\t$dst, $addr">;  // DynAlloc node points to dynamically allocated stack space.  // $sp is added to the list of implicitly used registers to prevent dead code  // elimination from removing instructions that modify $sp.  let Uses = [SP] in -def DynAlloc : EffectiveAddress<"addiu\t$dst, ${addr:stackloc}">; +def DynAlloc : EffectiveAddress<"addiu\t$dst, $addr">;  // MADD*/MSUB*  def MADD  : MArithR<0, "madd", MipsMAdd, 1>;  | 

