diff options
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/docs/WritingAnLLVMBackend.html | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/llvm/docs/WritingAnLLVMBackend.html b/llvm/docs/WritingAnLLVMBackend.html index acb5defbece..7277b029b7c 100644 --- a/llvm/docs/WritingAnLLVMBackend.html +++ b/llvm/docs/WritingAnLLVMBackend.html @@ -742,8 +742,8 @@ IntRegsClass::IntRegsClass() : TargetRegisterClass(IntRegsRegClassID, </div> <!-- ======================================================================= --> <div class="doc_subsection"> - <a name="implementRegister">Implement a subclass of - <a href="http://www.llvm.org/docs/CodeGenerator.html#targetregisterinfo">TargetRegisterInfo</a></a> + <a name="implementRegister">Implement a subclass of</a> + <a href="http://www.llvm.org/docs/CodeGenerator.html#targetregisterinfo">TargetRegisterInfo</a> </div> <div class="doc_text"> <p>The final step is to hand code portions of XXXRegisterInfo, which @@ -998,8 +998,8 @@ be taken to ensure the values in <tt>Sparc.h</tt> correspond to the values in <!-- ======================================================================= --> <div class="doc_subsection"> - <a name="implementInstr">Implement a subclass of - <a href="http://www.llvm.org/docs/CodeGenerator.html#targetinstrinfo">TargetInstrInfo</a></a> + <a name="implementInstr">Implement a subclass of </a> + <a href="http://www.llvm.org/docs/CodeGenerator.html#targetinstrinfo">TargetInstrInfo</a> </div> <div class="doc_text"> @@ -1339,7 +1339,7 @@ addRegisterClass(MVT::f64, SP::DFPRegsRegisterClass); <p>You should examine the node types in the ISD namespace (<tt>include/llvm/CodeGen/SelectionDAGNodes.h</tt>) and determine which operations the target natively supports. For operations -that do <u>not</u> have native support, add a callback to the constructor for +that do <b>not</b> have native support, add a callback to the constructor for the XXXTargetLowering class, so the instruction selection process knows what to do. The TargetLowering class callback methods (declared in <tt>llvm/Target/TargetLowering.h</tt>) are:</p> @@ -1465,7 +1465,7 @@ assert(Op.getValueType() == MVT::i32); </div> <div class="doc_text"> <p>The <tt>Legal</tt> LegalizeAction enum value simply indicates that an -operation <u>is</u> natively supported. <tt>Legal</tt> represents the default condition, +operation <b>is</b> natively supported. <tt>Legal</tt> represents the default condition, so it is rarely used. In <tt>SparcISelLowering.cpp</tt>, the action for CTPOP (an operation to count the bits set in an integer) is natively supported only for SPARC v9. The following code enables the <tt>Expand</tt> conversion technique for non-v9 @@ -2067,7 +2067,7 @@ implemented with assembler. </p> <a href="http://jigsaw.w3.org/css-validator/check/referer"><img src="http://jigsaw.w3.org/css-validator/images/vcss" alt="Valid CSS!"></a> <a href="http://validator.w3.org/check/referer"><img - src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!" /></a> + src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!"></a> <a href="http://www.woo.com">Mason Woo</a> and <a href="http://misha.brukman.net">Misha Brukman</a><br> <a href="http://llvm.org">The LLVM Compiler Infrastructure</a> |
