summaryrefslogtreecommitdiffstats
path: root/llvm
diff options
context:
space:
mode:
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/AArch64/AArch64FrameLowering.cpp14
-rw-r--r--llvm/test/CodeGen/AArch64/arm64-blockaddress.ll8
-rw-r--r--llvm/test/CodeGen/AArch64/no_cfi.ll13
3 files changed, 24 insertions, 11 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
index 970d7802b1d..eca9b1e75c2 100644
--- a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
@@ -935,15 +935,15 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF,
emitFrameOffset(MBB, MBBI, DL, AArch64::SP, AArch64::SP,
{-NumBytes, MVT::i8}, TII, MachineInstr::FrameSetup,
false, NeedsWinCFI, &HasWinCFI);
- if (!NeedsWinCFI) {
+ if (!NeedsWinCFI && needsFrameMoves) {
// Label used to tie together the PROLOG_LABEL and the MachineMoves.
MCSymbol *FrameLabel = MMI.getContext().createTempSymbol();
- // Encode the stack size of the leaf function.
- unsigned CFIIndex = MF.addFrameInst(
- MCCFIInstruction::createDefCfaOffset(FrameLabel, -NumBytes));
- BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
- .addCFIIndex(CFIIndex)
- .setMIFlags(MachineInstr::FrameSetup);
+ // Encode the stack size of the leaf function.
+ unsigned CFIIndex = MF.addFrameInst(
+ MCCFIInstruction::createDefCfaOffset(FrameLabel, -NumBytes));
+ BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
+ .addCFIIndex(CFIIndex)
+ .setMIFlags(MachineInstr::FrameSetup);
}
}
diff --git a/llvm/test/CodeGen/AArch64/arm64-blockaddress.ll b/llvm/test/CodeGen/AArch64/arm64-blockaddress.ll
index b50ffdef5dd..b35cb28b472 100644
--- a/llvm/test/CodeGen/AArch64/arm64-blockaddress.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-blockaddress.ll
@@ -7,12 +7,12 @@
define i64 @t() nounwind ssp {
entry:
; CHECK-LABEL: t:
-; CHECK: adrp [[REG:x[0-9]+]], Ltmp1@PAGE
-; CHECK: add {{x[0-9]+}}, [[REG]], Ltmp1@PAGEOFF
+; CHECK: adrp [[REG:x[0-9]+]], Ltmp0@PAGE
+; CHECK: add {{x[0-9]+}}, [[REG]], Ltmp0@PAGEOFF
; CHECK-LINUX-LABEL: t:
-; CHECK-LINUX: adrp [[REG:x[0-9]+]], .Ltmp1
-; CHECK-LINUX: add {{x[0-9]+}}, [[REG]], :lo12:.Ltmp1
+; CHECK-LINUX: adrp [[REG:x[0-9]+]], .Ltmp0
+; CHECK-LINUX: add {{x[0-9]+}}, [[REG]], :lo12:.Ltmp0
; CHECK-LARGE-LABEL: t:
; CHECK-LARGE: movz [[ADDR_REG:x[0-9]+]], #:abs_g0_nc:[[DEST_LBL:.Ltmp[0-9]+]]
diff --git a/llvm/test/CodeGen/AArch64/no_cfi.ll b/llvm/test/CodeGen/AArch64/no_cfi.ll
new file mode 100644
index 00000000000..49e34b3c5e1
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/no_cfi.ll
@@ -0,0 +1,13 @@
+; RUN: llc -mtriple aarch64-arm-linux-gnu -o - %s | FileCheck %s
+
+; CHECK: a: // @a
+; CHECK-NEXT: // %bb.0:
+; CHECK-NEXT: sub sp, sp, #16
+; CHECK-NOT: .cfi{{.*}}
+; CHECK: ret
+define void @a() nounwind {
+ %1 = alloca i32, align 4
+ store i32 1, i32* %1, align 4
+ ret void
+}
+
OpenPOWER on IntegriCloud