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-rw-r--r--llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp1
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.h2
-rw-r--r--llvm/test/CodeGen/ARM/pr25317.ll11
3 files changed, 14 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
index dc9eefe6ade..cd73021dfc6 100644
--- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -3924,6 +3924,7 @@ SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
// be an immediate and not a memory constraint.
// Fallthrough.
case InlineAsm::Constraint_m:
+ case InlineAsm::Constraint_o:
case InlineAsm::Constraint_Q:
case InlineAsm::Constraint_Um:
case InlineAsm::Constraint_Un:
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.h b/llvm/lib/Target/ARM/ARMISelLowering.h
index 1c260f253ec..e4b8891728b 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.h
+++ b/llvm/lib/Target/ARM/ARMISelLowering.h
@@ -348,6 +348,8 @@ namespace llvm {
getInlineAsmMemConstraint(StringRef ConstraintCode) const override {
if (ConstraintCode == "Q")
return InlineAsm::Constraint_Q;
+ else if (ConstraintCode == "o")
+ return InlineAsm::Constraint_o;
else if (ConstraintCode.size() == 2) {
if (ConstraintCode[0] == 'U') {
switch(ConstraintCode[1]) {
diff --git a/llvm/test/CodeGen/ARM/pr25317.ll b/llvm/test/CodeGen/ARM/pr25317.ll
new file mode 100644
index 00000000000..6770c6f84ec
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/pr25317.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s | FileCheck %s
+
+target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
+target triple = "armv7--linux-gnueabihf"
+
+; CHECK-LABEL: f:
+; CHECK: str lr, [r0]
+define void @f(i32* %p) {
+ call void asm sideeffect "str lr, $0", "=*o"(i32* %p)
+ ret void
+} \ No newline at end of file
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