diff options
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn index 7a0610e5bbe..7df0713f129 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn @@ -20,17 +20,31 @@ tablegen("RISCVGenDAGISel") { td_file = "RISCV.td" } +tablegen("RISCVGenGlobalISel") { + visibility = [ ":LLVMRISCVCodeGen" ] + args = [ "-gen-global-isel" ] + td_file = "RISCV.td" +} + tablegen("RISCVGenMCPseudoLowering") { visibility = [ ":LLVMRISCVCodeGen" ] args = [ "-gen-pseudo-lowering" ] td_file = "RISCV.td" } +tablegen("RISCVGenRegisterBank") { + visibility = [ ":LLVMRISCVCodeGen" ] + args = [ "-gen-register-bank" ] + td_file = "RISCV.td" +} + static_library("LLVMRISCVCodeGen") { deps = [ ":RISCVGenCompressInstEmitter", ":RISCVGenDAGISel", + ":RISCVGenGlobalISel", ":RISCVGenMCPseudoLowering", + ":RISCVGenRegisterBank", "MCTargetDesc", "TargetInfo", "Utils", @@ -46,13 +60,17 @@ static_library("LLVMRISCVCodeGen") { include_dirs = [ "." ] sources = [ "RISCVAsmPrinter.cpp", + "RISCVCallLowering.cpp", "RISCVExpandPseudoInsts.cpp", "RISCVFrameLowering.cpp", "RISCVISelDAGToDAG.cpp", "RISCVISelLowering.cpp", "RISCVInstrInfo.cpp", + "RISCVInstructionSelector.cpp", + "RISCVLegalizerInfo.cpp", "RISCVMCInstLower.cpp", "RISCVMergeBaseOffset.cpp", + "RISCVRegisterBankInfo.cpp", "RISCVRegisterInfo.cpp", "RISCVSubtarget.cpp", "RISCVTargetMachine.cpp", |
