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-rw-r--r--llvm/utils/TableGen/AsmMatcherEmitter.cpp6
-rw-r--r--llvm/utils/TableGen/CodeGenMapTable.cpp8
-rw-r--r--llvm/utils/TableGen/DAGISelMatcherGen.cpp2
-rw-r--r--llvm/utils/TableGen/DFAPacketizerEmitter.cpp4
-rw-r--r--llvm/utils/TableGen/DisassemblerEmitter.cpp2
-rw-r--r--llvm/utils/TableGen/FixedLenDecoderEmitter.cpp2
-rw-r--r--llvm/utils/TableGen/InstrDocsEmitter.cpp2
-rw-r--r--llvm/utils/TableGen/InstrInfoEmitter.cpp26
-rw-r--r--llvm/utils/TableGen/SubtargetEmitter.cpp4
-rw-r--r--llvm/utils/TableGen/WebAssemblyDisassemblerEmitter.cpp2
10 files changed, 29 insertions, 29 deletions
diff --git a/llvm/utils/TableGen/AsmMatcherEmitter.cpp b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
index 508efa8bf5e..d32366e2986 100644
--- a/llvm/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
@@ -2381,7 +2381,7 @@ static void emitMatchClassEnumeration(CodeGenTarget &Target,
OS << " NumMatchClassKinds\n";
OS << "};\n\n";
- OS << "}\n\n";
+ OS << "} // end anonymous namespace\n\n";
}
/// emitMatchClassDiagStrings - Emit a function to get the diagnostic text to be
@@ -2866,7 +2866,7 @@ static void emitCustomOperandParsing(raw_ostream &OS, CodeGenTarget &Target,
OS << " }\n";
OS << " };\n";
- OS << "} // end anonymous namespace.\n\n";
+ OS << "} // end anonymous namespace\n\n";
OS << "static const OperandMatchEntry OperandMatchTable["
<< Info.OperandMatchInfo.size() << "] = {\n";
@@ -3422,7 +3422,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
OS << " }\n";
OS << " };\n";
- OS << "} // end anonymous namespace.\n\n";
+ OS << "} // end anonymous namespace\n\n";
unsigned VariantCount = Target.getAsmParserVariantCount();
for (unsigned VC = 0; VC != VariantCount; ++VC) {
diff --git a/llvm/utils/TableGen/CodeGenMapTable.cpp b/llvm/utils/TableGen/CodeGenMapTable.cpp
index b1774b01ba8..7a5175ac354 100644
--- a/llvm/utils/TableGen/CodeGenMapTable.cpp
+++ b/llvm/utils/TableGen/CodeGenMapTable.cpp
@@ -168,7 +168,7 @@ public:
return ValueCols;
}
};
-} // End anonymous namespace.
+} // end anonymous namespace
//===----------------------------------------------------------------------===//
@@ -226,7 +226,7 @@ public:
void emitMapFuncBody(raw_ostream &OS, unsigned TableSize);
};
-} // End anonymous namespace.
+} // end anonymous namespace
//===----------------------------------------------------------------------===//
@@ -604,8 +604,8 @@ void EmitMapTable(RecordKeeper &Records, raw_ostream &OS) {
// Emit map tables and the functions to query them.
IMap.emitTablesWithFunc(OS);
}
- OS << "} // End " << NameSpace << " namespace\n";
- OS << "} // End llvm namespace\n";
+ OS << "} // end namespace " << NameSpace << "\n";
+ OS << "} // end namespace llvm\n";
OS << "#endif // GET_INSTRMAP_INFO\n\n";
}
diff --git a/llvm/utils/TableGen/DAGISelMatcherGen.cpp b/llvm/utils/TableGen/DAGISelMatcherGen.cpp
index c6fb05c6364..49c09c7d195 100644
--- a/llvm/utils/TableGen/DAGISelMatcherGen.cpp
+++ b/llvm/utils/TableGen/DAGISelMatcherGen.cpp
@@ -141,7 +141,7 @@ namespace {
SmallVectorImpl<unsigned> &ResultOps);
};
-} // end anon namespace.
+} // end anonymous namespace
MatcherGen::MatcherGen(const PatternToMatch &pattern,
const CodeGenDAGPatterns &cgp)
diff --git a/llvm/utils/TableGen/DFAPacketizerEmitter.cpp b/llvm/utils/TableGen/DFAPacketizerEmitter.cpp
index dabcc8f8ed5..0d6bcfe428c 100644
--- a/llvm/utils/TableGen/DFAPacketizerEmitter.cpp
+++ b/llvm/utils/TableGen/DFAPacketizerEmitter.cpp
@@ -628,7 +628,7 @@ void DFA::writeTableAndAPI(raw_ostream &OS, const std::string &TargetName,
OS << " // states " << (lastState+1) << ":" << numStates << "\n";
OS << "};\n";
- OS << "} // namespace\n";
+ OS << "} // end namespace llvm\n";
//
// Emit DFA Packetizer tables if the target is a VLIW machine.
@@ -640,7 +640,7 @@ void DFA::writeTableAndAPI(raw_ostream &OS, const std::string &TargetName,
<< "createDFAPacketizer(const InstrItineraryData *IID) const {\n"
<< " return new DFAPacketizer(IID, " << TargetName
<< "DFAStateInputTable, " << TargetName << "DFAStateEntryTable);\n}\n\n";
- OS << "} // End llvm namespace \n";
+ OS << "} // end namespace llvm\n";
}
//
diff --git a/llvm/utils/TableGen/DisassemblerEmitter.cpp b/llvm/utils/TableGen/DisassemblerEmitter.cpp
index 9e75c7fba77..0002b0e14db 100644
--- a/llvm/utils/TableGen/DisassemblerEmitter.cpp
+++ b/llvm/utils/TableGen/DisassemblerEmitter.cpp
@@ -153,4 +153,4 @@ void EmitDisassembler(RecordKeeper &Records, raw_ostream &OS) {
"MCDisassembler::Success", "MCDisassembler::Fail", "");
}
-} // End llvm namespace
+} // end namespace llvm
diff --git a/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp b/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
index dc9dfa8ff5e..01f4115aa1d 100644
--- a/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
+++ b/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
@@ -2465,7 +2465,7 @@ void FixedLenDecoderEmitter::run(raw_ostream &o) {
// Emit the main entry point for the decoder, decodeInstruction().
emitDecodeInstruction(OS);
- OS << "\n} // End llvm namespace\n";
+ OS << "\n} // end namespace llvm\n";
}
namespace llvm {
diff --git a/llvm/utils/TableGen/InstrDocsEmitter.cpp b/llvm/utils/TableGen/InstrDocsEmitter.cpp
index 91c457ba08f..45fa936b957 100644
--- a/llvm/utils/TableGen/InstrDocsEmitter.cpp
+++ b/llvm/utils/TableGen/InstrDocsEmitter.cpp
@@ -231,4 +231,4 @@ void EmitInstrDocs(RecordKeeper &RK, raw_ostream &OS) {
}
}
-} // end llvm namespace
+} // end namespace llvm
diff --git a/llvm/utils/TableGen/InstrInfoEmitter.cpp b/llvm/utils/TableGen/InstrInfoEmitter.cpp
index 2d367f538b7..ae48d383cdf 100644
--- a/llvm/utils/TableGen/InstrInfoEmitter.cpp
+++ b/llvm/utils/TableGen/InstrInfoEmitter.cpp
@@ -436,8 +436,8 @@ void InstrInfoEmitter::emitMCIIHelperMethods(raw_ostream &OS,
<< "(const MCInst &MI);\n";
}
- OS << "\n} // end " << TargetName << "_MC namespace\n";
- OS << "} // end llvm namespace\n\n";
+ OS << "\n} // end namespace " << TargetName << "_MC\n";
+ OS << "} // end namespace llvm\n\n";
OS << "#endif // GET_INSTRINFO_MC_HELPER_DECLS\n\n";
@@ -459,8 +459,8 @@ void InstrInfoEmitter::emitMCIIHelperMethods(raw_ostream &OS,
OS << "\n}\n\n";
}
- OS << "} // end " << TargetName << "_MC namespace\n";
- OS << "} // end llvm namespace\n\n";
+ OS << "} // end namespace " << TargetName << "_MC\n";
+ OS << "} // end namespace llvm\n\n";
OS << "#endif // GET_GENISTRINFO_MC_HELPERS\n";
}
@@ -576,7 +576,7 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
<< TargetName << "InstrNameIndices, " << TargetName << "InstrNameData, "
<< NumberedInstructions.size() << ");\n}\n\n";
- OS << "} // end llvm namespace\n";
+ OS << "} // end namespace llvm\n";
OS << "#endif // GET_INSTRINFO_MC_DESC\n\n";
@@ -592,7 +592,7 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
<< " ~" << ClassName << "() override = default;\n";
- OS << "\n};\n} // end llvm namespace\n";
+ OS << "\n};\n} // end namespace llvm\n";
OS << "#endif // GET_INSTRINFO_HEADER\n\n";
@@ -620,7 +620,7 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
<< " InitMCInstrInfo(" << TargetName << "Insts, " << TargetName
<< "InstrNameIndices, " << TargetName << "InstrNameData, "
<< NumberedInstructions.size() << ");\n}\n";
- OS << "} // end llvm namespace\n";
+ OS << "} // end namespace llvm\n";
OS << "#endif // GET_INSTRINFO_CTOR_DTOR\n\n";
@@ -765,8 +765,8 @@ void InstrInfoEmitter::emitEnums(raw_ostream &OS) {
OS << " " << Inst->TheDef->getName() << "\t= " << Num++ << ",\n";
OS << " INSTRUCTION_LIST_END = " << Num << "\n";
OS << " };\n\n";
- OS << "} // end " << Namespace << " namespace\n";
- OS << "} // end llvm namespace\n";
+ OS << "} // end namespace " << Namespace << "\n";
+ OS << "} // end namespace llvm\n";
OS << "#endif // GET_INSTRINFO_ENUM\n\n";
OS << "#ifdef GET_INSTRINFO_SCHED_ENUM\n";
@@ -780,9 +780,9 @@ void InstrInfoEmitter::emitEnums(raw_ostream &OS) {
OS << " " << Class.Name << "\t= " << Num++ << ",\n";
OS << " SCHED_LIST_END = " << Num << "\n";
OS << " };\n";
- OS << "} // end Sched namespace\n";
- OS << "} // end " << Namespace << " namespace\n";
- OS << "} // end llvm namespace\n";
+ OS << "} // end namespace Sched\n";
+ OS << "} // end namespace " << Namespace << "\n";
+ OS << "} // end namespace llvm\n";
OS << "#endif // GET_INSTRINFO_SCHED_ENUM\n\n";
}
@@ -794,4 +794,4 @@ void EmitInstrInfo(RecordKeeper &RK, raw_ostream &OS) {
EmitMapTable(RK, OS);
}
-} // end llvm namespace
+} // end namespace llvm
diff --git a/llvm/utils/TableGen/SubtargetEmitter.cpp b/llvm/utils/TableGen/SubtargetEmitter.cpp
index 9ce2b3b275c..41589b6b10d 100644
--- a/llvm/utils/TableGen/SubtargetEmitter.cpp
+++ b/llvm/utils/TableGen/SubtargetEmitter.cpp
@@ -1728,7 +1728,7 @@ void SubtargetEmitter::emitGenMCSubtargetInfo(raw_ostream &OS) {
<< " const MCInst *MI, unsigned CPUID) {\n";
emitSchedModelHelpersImpl(OS, /* OnlyExpandMCPredicates */ true);
OS << "}\n";
- OS << "} // end of namespace " << Target << "_MC\n\n";
+ OS << "} // end namespace " << Target << "_MC\n\n";
OS << "struct " << Target
<< "GenMCSubtargetInfo : public MCSubtargetInfo {\n";
@@ -1858,7 +1858,7 @@ void SubtargetEmitter::run(raw_ostream &OS) {
OS << "namespace " << Target << "_MC {\n"
<< "unsigned resolveVariantSchedClassImpl(unsigned SchedClass,"
<< " const MCInst *MI, unsigned CPUID);\n"
- << "}\n\n";
+ << "} // end namespace " << Target << "_MC\n\n";
OS << "struct " << ClassName << " : public TargetSubtargetInfo {\n"
<< " explicit " << ClassName << "(const Triple &TT, StringRef CPU, "
<< "StringRef FS);\n"
diff --git a/llvm/utils/TableGen/WebAssemblyDisassemblerEmitter.cpp b/llvm/utils/TableGen/WebAssemblyDisassemblerEmitter.cpp
index 365cba5a60c..54aa5a8164f 100644
--- a/llvm/utils/TableGen/WebAssemblyDisassemblerEmitter.cpp
+++ b/llvm/utils/TableGen/WebAssemblyDisassemblerEmitter.cpp
@@ -167,7 +167,7 @@ void emitWebAssemblyDisassemblerTables(
OS << " },\n";
}
OS << " { 0, nullptr }\n};\n\n";
- OS << "} // End llvm namespace\n";
+ OS << "} // end namespace llvm\n";
}
} // namespace llvm
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