diff options
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 7 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/r600-export-fix.ll | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/SystemZ/vec-perm-13.ll | 4 |
3 files changed, 4 insertions, 11 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index bd882871246..d6f61851c29 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -13064,13 +13064,6 @@ SDValue DAGCombiner::reduceBuildVecToShuffle(SDNode *N) { Mask[i] = Vec2Offset + ExtIndex; } - // Avoid introducing illegal shuffles with zero. - // TODO: This doesn't actually do anything smart at the moment. - // We should either delete this, or check legality for all the shuffles - // we create. - if (UsesZeroVector && !TLI.isVectorClearMaskLegal(Mask, VT)) - return SDValue(); - // The type the input vectors may have changed above. InVT1 = VecIn1.getValueType(); diff --git a/llvm/test/CodeGen/AMDGPU/r600-export-fix.ll b/llvm/test/CodeGen/AMDGPU/r600-export-fix.ll index 7d86f9e3b3f..665feeb678b 100644 --- a/llvm/test/CodeGen/AMDGPU/r600-export-fix.ll +++ b/llvm/test/CodeGen/AMDGPU/r600-export-fix.ll @@ -3,9 +3,9 @@ ;CHECK: EXPORT T{{[0-9]}}.XYZW ;CHECK: EXPORT T{{[0-9]}}.0000 ;CHECK: EXPORT T{{[0-9]}}.0000 -;CHECK: EXPORT T{{[0-9]}}.0XYZ +;CHECK: EXPORT T{{[0-9]}}.0YZW ;CHECK: EXPORT T{{[0-9]}}.XYZW -;CHECK: EXPORT T{{[0-9]}}.YZ00 +;CHECK: EXPORT T{{[0-9]}}.XY00 ;CHECK: EXPORT T{{[0-9]}}.0000 ;CHECK: EXPORT T{{[0-9]}}.0000 diff --git a/llvm/test/CodeGen/SystemZ/vec-perm-13.ll b/llvm/test/CodeGen/SystemZ/vec-perm-13.ll index 708d8de53f8..d4aeffc6641 100644 --- a/llvm/test/CodeGen/SystemZ/vec-perm-13.ll +++ b/llvm/test/CodeGen/SystemZ/vec-perm-13.ll @@ -19,8 +19,8 @@ define <4 x i16> @f1(<4 x i16> %x) { ; CHECK-VECTOR-NEXT: .space 1 ; CHECK-VECTOR-NEXT: .byte 6 ; CHECK-VECTOR-NEXT: .byte 7 -; CHECK-VECTOR-NEXT: .byte 16 -; CHECK-VECTOR-NEXT: .byte 17 +; CHECK-VECTOR-NEXT: .byte 22 +; CHECK-VECTOR-NEXT: .byte 23 ; CHECK-VECTOR-NEXT: .space 1 ; CHECK-VECTOR-NEXT: .space 1 ; CHECK-VECTOR-NEXT: .space 1 |
