diff options
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 13 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/fmf-propagation.ll | 4 |
2 files changed, 12 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index a4c1e9886ae..98e7f4055e9 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -7941,9 +7941,16 @@ SDValue DAGCombiner::visitSELECT(SDNode *N) { } if (TLI.isOperationLegal(ISD::SELECT_CC, VT) || - (!LegalOperations && TLI.isOperationLegalOrCustom(ISD::SELECT_CC, VT))) - return DAG.getNode(ISD::SELECT_CC, DL, VT, Cond0, Cond1, N1, N2, - N0.getOperand(2)); + (!LegalOperations && + TLI.isOperationLegalOrCustom(ISD::SELECT_CC, VT))) { + // Any flags available in a select/setcc fold will be on the setcc as they + // migrated from fcmp + const SDNodeFlags Flags = N0.getNode()->getFlags(); + SDValue SelectNode = DAG.getNode(ISD::SELECT_CC, DL, VT, Cond0, Cond1, N1, + N2, N0.getOperand(2)); + SelectNode->setFlags(Flags); + return SelectNode; + } return SimplifySelect(DL, N0, N1, N2); } diff --git a/llvm/test/CodeGen/PowerPC/fmf-propagation.ll b/llvm/test/CodeGen/PowerPC/fmf-propagation.ll index 0ce4701d683..a62ef79f509 100644 --- a/llvm/test/CodeGen/PowerPC/fmf-propagation.ll +++ b/llvm/test/CodeGen/PowerPC/fmf-propagation.ll @@ -375,11 +375,11 @@ define float @sqrt_fast(float %x) { ; fcmp can have fast-math-flags. ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fcmp_nnan:' -; FMFDEBUG: select_cc {{t[0-9]+}} +; FMFDEBUG: select_cc nnan {{t[0-9]+}} ; FMFDEBUG: Type-legalized selection DAG: %bb.0 'fcmp_nnan:' ; GLOBALDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fcmp_nnan:' -; GLOBALDEBUG: select_cc {{t[0-9]+}} +; GLOBALDEBUG: select_cc nnan {{t[0-9]+}} ; GLOBALDEBUG: Type-legalized selection DAG: %bb.0 'fcmp_nnan:' define double @fcmp_nnan(double %a, double %y, double %z) { |
