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-rw-r--r--llvm/lib/Target/AVR/AVRISelLowering.cpp4
-rw-r--r--llvm/test/CodeGen/AVR/rot.ll4
2 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/AVR/AVRISelLowering.cpp b/llvm/lib/Target/AVR/AVRISelLowering.cpp
index ef9c00e4b78..7d3faac1dcc 100644
--- a/llvm/lib/Target/AVR/AVRISelLowering.cpp
+++ b/llvm/lib/Target/AVR/AVRISelLowering.cpp
@@ -1500,9 +1500,9 @@ MachineBasicBlock *AVRTargetLowering::insertShift(MachineInstr &MI,
unsigned DstReg = MI.getOperand(0).getReg();
// BB:
- // cp 0, N
+ // cpi N, 0
// breq RemBB
- BuildMI(BB, dl, TII.get(AVR::CPRdRr)).addReg(ShiftAmtSrcReg).addReg(AVR::R0);
+ BuildMI(BB, dl, TII.get(AVR::CPIRdK)).addReg(ShiftAmtSrcReg).addImm(0);
BuildMI(BB, dl, TII.get(AVR::BREQk)).addMBB(RemBB);
// LoopBB:
diff --git a/llvm/test/CodeGen/AVR/rot.ll b/llvm/test/CodeGen/AVR/rot.ll
index e43daf3e6aa..a7b77d97ba6 100644
--- a/llvm/test/CodeGen/AVR/rot.ll
+++ b/llvm/test/CodeGen/AVR/rot.ll
@@ -6,7 +6,7 @@
define i8 @rol8(i8 %val, i8 %amt) {
; CHECK: andi r22, 7
- ; CHECK-NEXT: cp r22, r0
+ ; CHECK-NEXT: cpi r22, 0
; CHECK-NEXT: breq LBB0_2
; CHECK-NEXT: LBB0_1:
@@ -32,7 +32,7 @@ define i8 @rol8(i8 %val, i8 %amt) {
define i8 @ror8(i8 %val, i8 %amt) {
; CHECK: andi r22, 7
- ; CHECK-NEXT: cp r22, r0
+ ; CHECK-NEXT: cpi r22, 0
; CHECK-NEXT: breq LBB1_2
; CHECK-NEXT: LBB1_1:
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