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-rw-r--r--llvm/utils/TableGen/TableGen.cpp6
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/TableGen.cpp b/llvm/utils/TableGen/TableGen.cpp
index 7353c538270..debc7717afc 100644
--- a/llvm/utils/TableGen/TableGen.cpp
+++ b/llvm/utils/TableGen/TableGen.cpp
@@ -28,6 +28,7 @@ enum ActionType {
GenEmitter,
GenRegisterInfo,
GenInstrInfo,
+ GenInstrDocs,
GenAsmWriter,
GenAsmMatcher,
GenDisassembler,
@@ -62,6 +63,8 @@ namespace {
"Generate registers and register classes info"),
clEnumValN(GenInstrInfo, "gen-instr-info",
"Generate instruction descriptions"),
+ clEnumValN(GenInstrDocs, "gen-instr-docs",
+ "Generate instruction documentation"),
clEnumValN(GenCallingConv, "gen-callingconv",
"Generate calling convention descriptions"),
clEnumValN(GenAsmWriter, "gen-asm-writer",
@@ -124,6 +127,9 @@ bool LLVMTableGenMain(raw_ostream &OS, RecordKeeper &Records) {
case GenInstrInfo:
EmitInstrInfo(Records, OS);
break;
+ case GenInstrDocs:
+ EmitInstrDocs(Records, OS);
+ break;
case GenCallingConv:
EmitCallingConv(Records, OS);
break;
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