diff options
Diffstat (limited to 'llvm/utils/TableGen/SubtargetEmitter.cpp')
-rw-r--r-- | llvm/utils/TableGen/SubtargetEmitter.cpp | 32 |
1 files changed, 31 insertions, 1 deletions
diff --git a/llvm/utils/TableGen/SubtargetEmitter.cpp b/llvm/utils/TableGen/SubtargetEmitter.cpp index 986c50f8786..764fc88c2e5 100644 --- a/llvm/utils/TableGen/SubtargetEmitter.cpp +++ b/llvm/utils/TableGen/SubtargetEmitter.cpp @@ -478,6 +478,17 @@ void SubtargetEmitter::EmitStageAndOperandCycleData(raw_ostream &OS, OS << BypassTable; } +void SubtargetEmitter::EmitItineraryProp(raw_ostream &OS, const Record *R, + const char *Name, char Separator) { + OS << " "; + int V = R->getValueAsInt(Name); + if (V >= 0) + OS << V << Separator << " // " << Name; + else + OS << "DefaultItineraryProps." << Name << Separator; + OS << '\n'; +} + // // EmitProcessorData - Generate data for processor itineraries. // @@ -485,6 +496,8 @@ void SubtargetEmitter:: EmitProcessorData(raw_ostream &OS, std::vector<Record*> &ItinClassList, std::vector<std::vector<InstrItinerary> > &ProcList) { + OS << "static const llvm::InstrItineraryProps " << "DefaultItineraryProps;"; + // Get an iterator for processor itinerary stages std::vector<std::vector<InstrItinerary> >::iterator ProcListIter = ProcList.begin(); @@ -502,9 +515,19 @@ EmitProcessorData(raw_ostream &OS, // Skip default if (Name == "NoItineraries") continue; + // Begin processor itinerary properties + OS << "\n"; + OS << "static const llvm::InstrItineraryProps " << Name << "Props(\n"; + EmitItineraryProp(OS, Itin, "IssueWidth", ','); + EmitItineraryProp(OS, Itin, "MinLatency", ','); + EmitItineraryProp(OS, Itin, "LoadLatency", ','); + EmitItineraryProp(OS, Itin, "HighLatency", ' '); + OS << ");\n"; + // Begin processor itinerary table OS << "\n"; - OS << "static const llvm::InstrItinerary " << Name << "[] = {\n"; + OS << "static const llvm::InstrItinerary " << Name << "Entries" + << "[] = {\n"; // For each itinerary class std::vector<InstrItinerary> &ItinList = *ProcListIter++; @@ -531,6 +554,13 @@ EmitProcessorData(raw_ostream &OS, // End processor itinerary table OS << " { 1, ~0U, ~0U, ~0U, ~0U } // end marker\n"; OS << "};\n"; + + OS << '\n'; + OS << "static const llvm::InstrItinerarySubtargetValue " + << Name << " = {\n"; + OS << " &" << Name << "Props,\n"; + OS << " " << Name << "Entries\n"; + OS << "};\n"; } } |