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-rw-r--r--llvm/utils/TableGen/CodeGenInstruction.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/CodeGenInstruction.cpp b/llvm/utils/TableGen/CodeGenInstruction.cpp
index 44ee16f6fd7..bb6d9f0c707 100644
--- a/llvm/utils/TableGen/CodeGenInstruction.cpp
+++ b/llvm/utils/TableGen/CodeGenInstruction.cpp
@@ -327,6 +327,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R)
isInsertSubreg = R->getValueAsBit("isInsertSubreg");
isConvergent = R->getValueAsBit("isConvergent");
hasNoSchedulingInfo = R->getValueAsBit("hasNoSchedulingInfo");
+ FastISelShouldIgnore = R->getValueAsBit("FastISelShouldIgnore");
bool Unset;
mayLoad = R->getValueAsBitOrUnset("mayLoad", Unset);
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