diff options
Diffstat (limited to 'llvm/unittests')
3 files changed, 55 insertions, 41 deletions
diff --git a/llvm/unittests/tools/llvm-exegesis/Mips/SnippetGeneratorTest.cpp b/llvm/unittests/tools/llvm-exegesis/Mips/SnippetGeneratorTest.cpp index 79d0b708274..b9280ab6d68 100644 --- a/llvm/unittests/tools/llvm-exegesis/Mips/SnippetGeneratorTest.cpp +++ b/llvm/unittests/tools/llvm-exegesis/Mips/SnippetGeneratorTest.cpp @@ -81,8 +81,8 @@ TEST_F(LatencySnippetGeneratorTest, ImplicitSelfDependencyThroughExplicitRegs) { ASSERT_THAT(CT.Instructions, SizeIs(1)); const InstructionTemplate &IT = CT.Instructions[0]; EXPECT_THAT(IT.getOpcode(), Opcode); - ASSERT_THAT(IT.VariableValues, SizeIs(3)); - EXPECT_THAT(IT.VariableValues, + ASSERT_THAT(IT.getVariableValues(), SizeIs(3)); + EXPECT_THAT(IT.getVariableValues(), AnyOf(ElementsAre(IsReg(), IsInvalid(), IsReg()), ElementsAre(IsReg(), IsReg(), IsInvalid()))) << "Op0 is either set to Op1 or to Op2"; diff --git a/llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp b/llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp index 463eec2c21d..0f898d9d7bb 100644 --- a/llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp +++ b/llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp @@ -86,8 +86,8 @@ TEST_F(LatencySnippetGeneratorTest, ImplicitSelfDependencyThroughImplicitReg) { ASSERT_THAT(CT.Instructions, SizeIs(1)); const InstructionTemplate &IT = CT.Instructions[0]; EXPECT_THAT(IT.getOpcode(), Opcode); - ASSERT_THAT(IT.VariableValues, SizeIs(1)); // Imm. - EXPECT_THAT(IT.VariableValues[0], IsInvalid()) << "Immediate is not set"; + ASSERT_THAT(IT.getVariableValues(), SizeIs(1)); // Imm. + EXPECT_THAT(IT.getVariableValues()[0], IsInvalid()) << "Immediate is not set"; } TEST_F(LatencySnippetGeneratorTest, ImplicitSelfDependencyThroughTiedRegs) { @@ -109,9 +109,9 @@ TEST_F(LatencySnippetGeneratorTest, ImplicitSelfDependencyThroughTiedRegs) { ASSERT_THAT(CT.Instructions, SizeIs(1)); const InstructionTemplate &IT = CT.Instructions[0]; EXPECT_THAT(IT.getOpcode(), Opcode); - ASSERT_THAT(IT.VariableValues, SizeIs(2)); - EXPECT_THAT(IT.VariableValues[0], IsInvalid()) << "Operand 1 is not set"; - EXPECT_THAT(IT.VariableValues[1], IsInvalid()) << "Operand 2 is not set"; + ASSERT_THAT(IT.getVariableValues(), SizeIs(2)); + EXPECT_THAT(IT.getVariableValues()[0], IsInvalid()) << "Operand 1 is not set"; + EXPECT_THAT(IT.getVariableValues()[1], IsInvalid()) << "Operand 2 is not set"; } TEST_F(LatencySnippetGeneratorTest, ImplicitSelfDependencyThroughExplicitRegs) { @@ -131,8 +131,8 @@ TEST_F(LatencySnippetGeneratorTest, ImplicitSelfDependencyThroughExplicitRegs) { ASSERT_THAT(CT.Instructions, SizeIs(1)); const InstructionTemplate &IT = CT.Instructions[0]; EXPECT_THAT(IT.getOpcode(), Opcode); - ASSERT_THAT(IT.VariableValues, SizeIs(3)); - EXPECT_THAT(IT.VariableValues, + ASSERT_THAT(IT.getVariableValues(), SizeIs(3)); + EXPECT_THAT(IT.getVariableValues(), AnyOf(ElementsAre(IsReg(), IsInvalid(), IsReg()), ElementsAre(IsReg(), IsReg(), IsInvalid()))) << "Op0 is either set to Op1 or to Op2"; @@ -173,9 +173,10 @@ TEST_F(LatencySnippetGeneratorTest, DependencyThroughOtherOpcode) { ASSERT_THAT(CT.Instructions, SizeIs(2)); const InstructionTemplate &IT = CT.Instructions[0]; EXPECT_THAT(IT.getOpcode(), Opcode); - ASSERT_THAT(IT.VariableValues, SizeIs(2)); - EXPECT_THAT(IT.VariableValues, AnyOf(ElementsAre(IsReg(), IsInvalid()), - ElementsAre(IsInvalid(), IsReg()))); + ASSERT_THAT(IT.getVariableValues(), SizeIs(2)); + EXPECT_THAT(IT.getVariableValues(), + AnyOf(ElementsAre(IsReg(), IsInvalid()), + ElementsAre(IsInvalid(), IsReg()))); EXPECT_THAT(CT.Instructions[1].getOpcode(), Not(Opcode)); // TODO: check that the two instructions alias each other. } @@ -193,7 +194,7 @@ TEST_F(LatencySnippetGeneratorTest, LAHF) { ASSERT_THAT(CT.Instructions, SizeIs(2)); const InstructionTemplate &IT = CT.Instructions[0]; EXPECT_THAT(IT.getOpcode(), Opcode); - ASSERT_THAT(IT.VariableValues, SizeIs(0)); + ASSERT_THAT(IT.getVariableValues(), SizeIs(0)); } } @@ -212,9 +213,9 @@ TEST_F(UopsSnippetGeneratorTest, ParallelInstruction) { ASSERT_THAT(CT.Instructions, SizeIs(1)); const InstructionTemplate &IT = CT.Instructions[0]; EXPECT_THAT(IT.getOpcode(), Opcode); - ASSERT_THAT(IT.VariableValues, SizeIs(2)); - EXPECT_THAT(IT.VariableValues[0], IsInvalid()); - EXPECT_THAT(IT.VariableValues[1], IsInvalid()); + ASSERT_THAT(IT.getVariableValues(), SizeIs(2)); + EXPECT_THAT(IT.getVariableValues()[0], IsInvalid()); + EXPECT_THAT(IT.getVariableValues()[1], IsInvalid()); } TEST_F(UopsSnippetGeneratorTest, SerialInstruction) { @@ -233,7 +234,7 @@ TEST_F(UopsSnippetGeneratorTest, SerialInstruction) { ASSERT_THAT(CT.Instructions, SizeIs(1)); const InstructionTemplate &IT = CT.Instructions[0]; EXPECT_THAT(IT.getOpcode(), Opcode); - ASSERT_THAT(IT.VariableValues, SizeIs(0)); + ASSERT_THAT(IT.getVariableValues(), SizeIs(0)); } TEST_F(UopsSnippetGeneratorTest, StaticRenaming) { @@ -260,8 +261,8 @@ TEST_F(UopsSnippetGeneratorTest, StaticRenaming) { ASSERT_THAT(CT.Instructions, SizeIs(kInstructionCount)); std::unordered_set<unsigned> AllDefRegisters; for (const auto &IT : CT.Instructions) { - ASSERT_THAT(IT.VariableValues, SizeIs(3)); - AllDefRegisters.insert(IT.VariableValues[0].getReg()); + ASSERT_THAT(IT.getVariableValues(), SizeIs(3)); + AllDefRegisters.insert(IT.getVariableValues()[0].getReg()); } EXPECT_THAT(AllDefRegisters, SizeIs(kInstructionCount)) << "Each instruction writes to a different register"; @@ -291,12 +292,14 @@ TEST_F(UopsSnippetGeneratorTest, NoTiedVariables) { ASSERT_THAT(CT.Instructions, SizeIs(1)); const InstructionTemplate &IT = CT.Instructions[0]; EXPECT_THAT(IT.getOpcode(), Opcode); - ASSERT_THAT(IT.VariableValues, SizeIs(4)); - EXPECT_THAT(IT.VariableValues[0].getReg(), Not(IT.VariableValues[1].getReg())) + ASSERT_THAT(IT.getVariableValues(), SizeIs(4)); + EXPECT_THAT(IT.getVariableValues()[0].getReg(), + Not(IT.getVariableValues()[1].getReg())) << "Def is different from first Use"; - EXPECT_THAT(IT.VariableValues[0].getReg(), Not(IT.VariableValues[2].getReg())) + EXPECT_THAT(IT.getVariableValues()[0].getReg(), + Not(IT.getVariableValues()[2].getReg())) << "Def is different from second Use"; - EXPECT_THAT(IT.VariableValues[3], IsInvalid()); + EXPECT_THAT(IT.getVariableValues()[3], IsInvalid()); } TEST_F(UopsSnippetGeneratorTest, MemoryUse) { @@ -326,11 +329,11 @@ TEST_F(UopsSnippetGeneratorTest, MemoryUse) { SizeIs(UopsSnippetGenerator::kMinNumDifferentAddresses)); const InstructionTemplate &IT = CT.Instructions[0]; EXPECT_THAT(IT.getOpcode(), Opcode); - ASSERT_THAT(IT.VariableValues, SizeIs(6)); - EXPECT_EQ(IT.VariableValues[2].getImm(), 1); - EXPECT_EQ(IT.VariableValues[3].getReg(), 0u); - EXPECT_EQ(IT.VariableValues[4].getImm(), 0); - EXPECT_EQ(IT.VariableValues[5].getReg(), 0u); + ASSERT_THAT(IT.getVariableValues(), SizeIs(6)); + EXPECT_EQ(IT.getVariableValues()[2].getImm(), 1); + EXPECT_EQ(IT.getVariableValues()[3].getReg(), 0u); + EXPECT_EQ(IT.getVariableValues()[4].getImm(), 0); + EXPECT_EQ(IT.getVariableValues()[5].getReg(), 0u); } class FakeSnippetGenerator : public SnippetGenerator { @@ -338,10 +341,14 @@ public: FakeSnippetGenerator(const LLVMState &State, const Options &Opts) : SnippetGenerator(State, Opts) {} - Instruction createInstruction(unsigned Opcode) { + const Instruction &getInstr(unsigned Opcode) { return State.getIC().getInstr(Opcode); } + InstructionTemplate getInstructionTemplate(unsigned Opcode) { + return {&getInstr(Opcode)}; + } + private: Expected<std::vector<CodeTemplate>> generateCodeTemplates(const Instruction &, const BitVector &) const override { @@ -389,8 +396,8 @@ TEST_F(FakeSnippetGeneratorTest, ComputeRegisterInitialValuesAdd16ri) { // explicit use 1 : reg RegClass=GR16 | TIED_TO:0 // explicit use 2 : imm // implicit def : EFLAGS - InstructionTemplate IT(Generator.createInstruction(X86::ADD16ri)); - IT.getValueFor(IT.Instr.Variables[0]) = MCOperand::createReg(X86::AX); + InstructionTemplate IT = Generator.getInstructionTemplate(X86::ADD16ri); + IT.getValueFor(IT.getInstr().Variables[0]) = MCOperand::createReg(X86::AX); std::vector<InstructionTemplate> Snippet; Snippet.push_back(std::move(IT)); const auto RIV = Generator.computeRegisterInitialValues(Snippet); @@ -404,15 +411,18 @@ TEST_F(FakeSnippetGeneratorTest, ComputeRegisterInitialValuesAdd64rr) { // -> only rbx needs defining. std::vector<InstructionTemplate> Snippet; { - InstructionTemplate Mov(Generator.createInstruction(X86::MOV64ri)); - Mov.getValueFor(Mov.Instr.Variables[0]) = MCOperand::createReg(X86::RAX); - Mov.getValueFor(Mov.Instr.Variables[1]) = MCOperand::createImm(42); + InstructionTemplate Mov = Generator.getInstructionTemplate(X86::MOV64ri); + Mov.getValueFor(Mov.getInstr().Variables[0]) = + MCOperand::createReg(X86::RAX); + Mov.getValueFor(Mov.getInstr().Variables[1]) = MCOperand::createImm(42); Snippet.push_back(std::move(Mov)); } { - InstructionTemplate Add(Generator.createInstruction(X86::ADD64rr)); - Add.getValueFor(Add.Instr.Variables[0]) = MCOperand::createReg(X86::RAX); - Add.getValueFor(Add.Instr.Variables[1]) = MCOperand::createReg(X86::RBX); + InstructionTemplate Add = Generator.getInstructionTemplate(X86::ADD64rr); + Add.getValueFor(Add.getInstr().Variables[0]) = + MCOperand::createReg(X86::RAX); + Add.getValueFor(Add.getInstr().Variables[1]) = + MCOperand::createReg(X86::RBX); Snippet.push_back(std::move(Add)); } diff --git a/llvm/unittests/tools/llvm-exegesis/X86/TargetTest.cpp b/llvm/unittests/tools/llvm-exegesis/X86/TargetTest.cpp index e15b7f2dbba..eefed6dd544 100644 --- a/llvm/unittests/tools/llvm-exegesis/X86/TargetTest.cpp +++ b/llvm/unittests/tools/llvm-exegesis/X86/TargetTest.cpp @@ -119,6 +119,10 @@ protected: Value); } + const Instruction &getInstr(unsigned OpCode) { + return State.getIC().getInstr(OpCode); + } + LLVMState State; }; @@ -355,8 +359,8 @@ TEST_F(Core2TargetTest, SetRegToFP1_4Bits) { } TEST_F(Core2Avx512TargetTest, FillMemoryOperands_ADD64rm) { - Instruction I(State.getInstrInfo(), State.getRATC(), X86::ADD64rm); - InstructionTemplate IT(I); + const Instruction &I = getInstr(X86::ADD64rm); + InstructionTemplate IT(&I); constexpr const int kOffset = 42; State.getExegesisTarget().fillMemoryOperands(IT, X86::RDI, kOffset); // Memory is operands 2-6. @@ -368,8 +372,8 @@ TEST_F(Core2Avx512TargetTest, FillMemoryOperands_ADD64rm) { } TEST_F(Core2Avx512TargetTest, FillMemoryOperands_VGATHERDPSZ128rm) { - Instruction I(State.getInstrInfo(), State.getRATC(), X86::VGATHERDPSZ128rm); - InstructionTemplate IT(I); + const Instruction &I = getInstr(X86::VGATHERDPSZ128rm); + InstructionTemplate IT(&I); constexpr const int kOffset = 42; State.getExegesisTarget().fillMemoryOperands(IT, X86::RDI, kOffset); // Memory is operands 4-8. |
