summaryrefslogtreecommitdiffstats
path: root/llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp')
-rw-r--r--llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp94
1 files changed, 47 insertions, 47 deletions
diff --git a/llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp b/llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp
index 7467222db13..7452b838beb 100644
--- a/llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp
+++ b/llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp
@@ -88,10 +88,10 @@ TEST_F(LatencySnippetGeneratorTest, ImplicitSelfDependency) {
const SnippetPrototype Proto = checkAndGetConfigurations(Opcode);
EXPECT_THAT(Proto.Explanation, HasSubstr("implicit"));
ASSERT_THAT(Proto.Snippet, SizeIs(1));
- const InstructionInstance &II = Proto.Snippet[0];
- EXPECT_THAT(II.getOpcode(), Opcode);
- ASSERT_THAT(II.VariableValues, SizeIs(1)); // Imm.
- EXPECT_THAT(II.VariableValues[0], IsInvalid()) << "Immediate is not set";
+ const InstructionBuilder &IB = Proto.Snippet[0];
+ EXPECT_THAT(IB.getOpcode(), Opcode);
+ ASSERT_THAT(IB.VariableValues, SizeIs(1)); // Imm.
+ EXPECT_THAT(IB.VariableValues[0], IsInvalid()) << "Immediate is not set";
}
TEST_F(LatencySnippetGeneratorTest, ExplicitSelfDependency) {
@@ -106,11 +106,11 @@ TEST_F(LatencySnippetGeneratorTest, ExplicitSelfDependency) {
const SnippetPrototype Proto = checkAndGetConfigurations(Opcode);
EXPECT_THAT(Proto.Explanation, HasSubstr("explicit"));
ASSERT_THAT(Proto.Snippet, SizeIs(1));
- const InstructionInstance &II = Proto.Snippet[0];
- EXPECT_THAT(II.getOpcode(), Opcode);
- ASSERT_THAT(II.VariableValues, SizeIs(2));
- EXPECT_THAT(II.VariableValues[0], IsReg()) << "Operand 0 and 1";
- EXPECT_THAT(II.VariableValues[1], IsInvalid()) << "Operand 2 is not set";
+ const InstructionBuilder &IB = Proto.Snippet[0];
+ EXPECT_THAT(IB.getOpcode(), Opcode);
+ ASSERT_THAT(IB.VariableValues, SizeIs(2));
+ EXPECT_THAT(IB.VariableValues[0], IsReg()) << "Operand 0 and 1";
+ EXPECT_THAT(IB.VariableValues[1], IsInvalid()) << "Operand 2 is not set";
}
TEST_F(LatencySnippetGeneratorTest, DependencyThroughOtherOpcode) {
@@ -123,10 +123,10 @@ TEST_F(LatencySnippetGeneratorTest, DependencyThroughOtherOpcode) {
const SnippetPrototype Proto = checkAndGetConfigurations(Opcode);
EXPECT_THAT(Proto.Explanation, HasSubstr("cycle through"));
ASSERT_THAT(Proto.Snippet, SizeIs(2));
- const InstructionInstance &II = Proto.Snippet[0];
- EXPECT_THAT(II.getOpcode(), Opcode);
- ASSERT_THAT(II.VariableValues, SizeIs(2));
- EXPECT_THAT(II.VariableValues, AnyOf(ElementsAre(IsReg(), IsInvalid()),
+ const InstructionBuilder &IB = Proto.Snippet[0];
+ EXPECT_THAT(IB.getOpcode(), Opcode);
+ ASSERT_THAT(IB.VariableValues, SizeIs(2));
+ EXPECT_THAT(IB.VariableValues, AnyOf(ElementsAre(IsReg(), IsInvalid()),
ElementsAre(IsInvalid(), IsReg())));
EXPECT_THAT(Proto.Snippet[1].getOpcode(), Not(Opcode));
// TODO: check that the two instructions alias each other.
@@ -137,9 +137,9 @@ TEST_F(LatencySnippetGeneratorTest, LAHF) {
const SnippetPrototype Proto = checkAndGetConfigurations(Opcode);
EXPECT_THAT(Proto.Explanation, HasSubstr("cycle through"));
ASSERT_THAT(Proto.Snippet, SizeIs(2));
- const InstructionInstance &II = Proto.Snippet[0];
- EXPECT_THAT(II.getOpcode(), Opcode);
- ASSERT_THAT(II.VariableValues, SizeIs(0));
+ const InstructionBuilder &IB = Proto.Snippet[0];
+ EXPECT_THAT(IB.getOpcode(), Opcode);
+ ASSERT_THAT(IB.VariableValues, SizeIs(0));
}
TEST_F(UopsSnippetGeneratorTest, ParallelInstruction) {
@@ -152,11 +152,11 @@ TEST_F(UopsSnippetGeneratorTest, ParallelInstruction) {
const SnippetPrototype Proto = checkAndGetConfigurations(Opcode);
EXPECT_THAT(Proto.Explanation, HasSubstr("parallel"));
ASSERT_THAT(Proto.Snippet, SizeIs(1));
- const InstructionInstance &II = Proto.Snippet[0];
- EXPECT_THAT(II.getOpcode(), Opcode);
- ASSERT_THAT(II.VariableValues, SizeIs(2));
- EXPECT_THAT(II.VariableValues[0], IsInvalid());
- EXPECT_THAT(II.VariableValues[1], IsInvalid());
+ const InstructionBuilder &IB = Proto.Snippet[0];
+ EXPECT_THAT(IB.getOpcode(), Opcode);
+ ASSERT_THAT(IB.VariableValues, SizeIs(2));
+ EXPECT_THAT(IB.VariableValues[0], IsInvalid());
+ EXPECT_THAT(IB.VariableValues[1], IsInvalid());
}
TEST_F(UopsSnippetGeneratorTest, SerialInstruction) {
@@ -169,9 +169,9 @@ TEST_F(UopsSnippetGeneratorTest, SerialInstruction) {
const SnippetPrototype Proto = checkAndGetConfigurations(Opcode);
EXPECT_THAT(Proto.Explanation, HasSubstr("serial"));
ASSERT_THAT(Proto.Snippet, SizeIs(1));
- const InstructionInstance &II = Proto.Snippet[0];
- EXPECT_THAT(II.getOpcode(), Opcode);
- ASSERT_THAT(II.VariableValues, SizeIs(0));
+ const InstructionBuilder &IB = Proto.Snippet[0];
+ EXPECT_THAT(IB.getOpcode(), Opcode);
+ ASSERT_THAT(IB.VariableValues, SizeIs(0));
}
TEST_F(UopsSnippetGeneratorTest, StaticRenaming) {
@@ -188,9 +188,9 @@ TEST_F(UopsSnippetGeneratorTest, StaticRenaming) {
constexpr const unsigned kInstructionCount = 15;
ASSERT_THAT(Proto.Snippet, SizeIs(kInstructionCount));
std::unordered_set<unsigned> AllDefRegisters;
- for (const auto &II : Proto.Snippet) {
- ASSERT_THAT(II.VariableValues, SizeIs(2));
- AllDefRegisters.insert(II.VariableValues[0].getReg());
+ for (const auto &IB : Proto.Snippet) {
+ ASSERT_THAT(IB.VariableValues, SizeIs(2));
+ AllDefRegisters.insert(IB.VariableValues[0].getReg());
}
EXPECT_THAT(AllDefRegisters, SizeIs(kInstructionCount))
<< "Each instruction writes to a different register";
@@ -209,14 +209,14 @@ TEST_F(UopsSnippetGeneratorTest, NoTiedVariables) {
const SnippetPrototype Proto = checkAndGetConfigurations(Opcode);
EXPECT_THAT(Proto.Explanation, HasSubstr("no tied variables"));
ASSERT_THAT(Proto.Snippet, SizeIs(1));
- const InstructionInstance &II = Proto.Snippet[0];
- EXPECT_THAT(II.getOpcode(), Opcode);
- ASSERT_THAT(II.VariableValues, SizeIs(4));
- EXPECT_THAT(II.VariableValues[0].getReg(), Not(II.VariableValues[1].getReg()))
+ const InstructionBuilder &IB = Proto.Snippet[0];
+ EXPECT_THAT(IB.getOpcode(), Opcode);
+ ASSERT_THAT(IB.VariableValues, SizeIs(4));
+ EXPECT_THAT(IB.VariableValues[0].getReg(), Not(IB.VariableValues[1].getReg()))
<< "Def is different from first Use";
- EXPECT_THAT(II.VariableValues[0].getReg(), Not(II.VariableValues[2].getReg()))
+ EXPECT_THAT(IB.VariableValues[0].getReg(), Not(IB.VariableValues[2].getReg()))
<< "Def is different from second Use";
- EXPECT_THAT(II.VariableValues[3], IsInvalid());
+ EXPECT_THAT(IB.VariableValues[3], IsInvalid());
}
TEST_F(UopsSnippetGeneratorTest, MemoryUse) {
@@ -226,13 +226,13 @@ TEST_F(UopsSnippetGeneratorTest, MemoryUse) {
EXPECT_THAT(Proto.Explanation, HasSubstr("no tied variables"));
ASSERT_THAT(Proto.Snippet,
SizeIs(UopsBenchmarkRunner::kMinNumDifferentAddresses));
- const InstructionInstance &II = Proto.Snippet[0];
- EXPECT_THAT(II.getOpcode(), Opcode);
- ASSERT_THAT(II.VariableValues, SizeIs(6));
- EXPECT_EQ(II.VariableValues[2].getImm(), 1);
- EXPECT_EQ(II.VariableValues[3].getReg(), 0u);
- EXPECT_EQ(II.VariableValues[4].getImm(), 0);
- EXPECT_EQ(II.VariableValues[5].getReg(), 0u);
+ const InstructionBuilder &IB = Proto.Snippet[0];
+ EXPECT_THAT(IB.getOpcode(), Opcode);
+ ASSERT_THAT(IB.VariableValues, SizeIs(6));
+ EXPECT_EQ(IB.VariableValues[2].getImm(), 1);
+ EXPECT_EQ(IB.VariableValues[3].getReg(), 0u);
+ EXPECT_EQ(IB.VariableValues[4].getImm(), 0);
+ EXPECT_EQ(IB.VariableValues[5].getReg(), 0u);
}
TEST_F(UopsSnippetGeneratorTest, MemoryUse_Movsb) {
@@ -274,11 +274,11 @@ TEST_F(FakeSnippetGeneratorTest, ComputeRegsToDefAdd16ri) {
// explicit use 1 : reg RegClass=GR16 | TIED_TO:0
// explicit use 2 : imm
// implicit def : EFLAGS
- InstructionInstance II(Runner.createInstruction(llvm::X86::ADD16ri));
- II.getValueFor(II.Instr.Variables[0]) =
+ InstructionBuilder IB(Runner.createInstruction(llvm::X86::ADD16ri));
+ IB.getValueFor(IB.Instr.Variables[0]) =
llvm::MCOperand::createReg(llvm::X86::AX);
- std::vector<InstructionInstance> Snippet;
- Snippet.push_back(std::move(II));
+ std::vector<InstructionBuilder> Snippet;
+ Snippet.push_back(std::move(IB));
const auto RegsToDef = Runner.computeRegsToDef(Snippet);
EXPECT_THAT(RegsToDef, UnorderedElementsAre(llvm::X86::AX));
}
@@ -288,16 +288,16 @@ TEST_F(FakeSnippetGeneratorTest, ComputeRegsToDefAdd64rr) {
// mov64ri rax, 42
// add64rr rax, rax, rbx
// -> only rbx needs defining.
- std::vector<InstructionInstance> Snippet;
+ std::vector<InstructionBuilder> Snippet;
{
- InstructionInstance Mov(Runner.createInstruction(llvm::X86::MOV64ri));
+ InstructionBuilder Mov(Runner.createInstruction(llvm::X86::MOV64ri));
Mov.getValueFor(Mov.Instr.Variables[0]) =
llvm::MCOperand::createReg(llvm::X86::RAX);
Mov.getValueFor(Mov.Instr.Variables[1]) = llvm::MCOperand::createImm(42);
Snippet.push_back(std::move(Mov));
}
{
- InstructionInstance Add(Runner.createInstruction(llvm::X86::ADD64rr));
+ InstructionBuilder Add(Runner.createInstruction(llvm::X86::ADD64rr));
Add.getValueFor(Add.Instr.Variables[0]) =
llvm::MCOperand::createReg(llvm::X86::RAX);
Add.getValueFor(Add.Instr.Variables[1]) =
OpenPOWER on IntegriCloud