diff options
Diffstat (limited to 'llvm/unittests/Transforms/Utils/ASanStackFrameLayoutTest.cpp')
-rw-r--r-- | llvm/unittests/Transforms/Utils/ASanStackFrameLayoutTest.cpp | 29 |
1 files changed, 28 insertions, 1 deletions
diff --git a/llvm/unittests/Transforms/Utils/ASanStackFrameLayoutTest.cpp b/llvm/unittests/Transforms/Utils/ASanStackFrameLayoutTest.cpp index 2337ec04776..777918e5cfd 100644 --- a/llvm/unittests/Transforms/Utils/ASanStackFrameLayoutTest.cpp +++ b/llvm/unittests/Transforms/Utils/ASanStackFrameLayoutTest.cpp @@ -68,9 +68,12 @@ TEST(ASanStackFrameLayout, Test) { VAR(a, 16, 16, 1, 0); VAR(a, 41, 9, 1, 7); VAR(a, 105, 103, 1, 0); + VAR(a, 200, 97, 1, 0); TEST_LAYOUT({a1_1}, 8, 16, "1 16 1 4 a1_1", "LL1R", "LL1R"); - TEST_LAYOUT({a1_1}, 64, 64, "1 64 1 4 a1_1", "L1", "L1"); + TEST_LAYOUT({a1_1}, 16, 16, "1 16 1 4 a1_1", "L1R", "L1R"); + TEST_LAYOUT({a1_1}, 32, 32, "1 32 1 4 a1_1", "L1R", "L1R"); + TEST_LAYOUT({a1_1}, 64, 64, "1 64 1 4 a1_1", "L1R", "L1R"); TEST_LAYOUT({p1_32}, 8, 32, "1 32 1 8 p1_32:15", "LLLL1RRR", "LLLL1RRR"); TEST_LAYOUT({p1_32}, 8, 64, "1 64 1 8 p1_32:15", "LLLLLLLL1RRRRRRR", "LLLLLLLL1RRRRRRR"); @@ -103,6 +106,30 @@ TEST(ASanStackFrameLayout, Test) { TEST_LAYOUT(t, 8, 32, "3 32 1 4 a1_1 48 16 5 a16_1 80 41 7 a41_1:7", "LLLL1M00MM000001RRRR", "LLLL1MSSMMSS0001RRRR"); } + + TEST_LAYOUT({a2_1}, 32, 32, "1 32 2 4 a2_1", "L2R", "L2R"); + TEST_LAYOUT({a9_1}, 32, 32, "1 32 9 4 a9_1", "L9R", "L9R"); + TEST_LAYOUT({a16_1}, 32, 32, "1 32 16 5 a16_1", "L16R", "LSR"); + TEST_LAYOUT({p1_256}, 32, 32, "1 256 1 11 p1_256:2700", + "LLLLLLLL1R", "LLLLLLLL1R"); + TEST_LAYOUT({a41_1}, 32, 32, "1 32 41 7 a41_1:7", "L09R", + "LS9R"); + TEST_LAYOUT({a105_1}, 32, 32, "1 32 105 6 a105_1", "L0009R", + "LSSSSR"); + TEST_LAYOUT({a200_1}, 32, 32, "1 32 200 6 a200_1", "L0000008RR", + "LSSSS008RR"); + + { + SmallVector<ASanStackVariableDescription, 10> t = {a1_1, p1_256}; + TEST_LAYOUT(t, 32, 32, "2 256 1 11 p1_256:2700 320 1 4 a1_1", + "LLLLLLLL1M1R", "LLLLLLLL1M1R"); + } + + { + SmallVector<ASanStackVariableDescription, 10> t = {a1_1, a16_1, a41_1}; + TEST_LAYOUT(t, 32, 32, "3 32 1 4 a1_1 96 16 5 a16_1 160 41 7 a41_1:7", + "L1M16M09R", "L1MSMS9R"); + } #undef VAR #undef TEST_LAYOUT } |