1 files changed, 10 insertions, 4 deletions
diff --git a/llvm/tools/llvm-mca/Scheduler.h b/llvm/tools/llvm-mca/Scheduler.h
index 8d44f61e32b..ec7d5a05c38 100644
--- a/llvm/tools/llvm-mca/Scheduler.h
+++ b/llvm/tools/llvm-mca/Scheduler.h
@@ -15,11 +15,9 @@
 #ifndef LLVM_TOOLS_LLVM_MCA_SCHEDULER_H
 #define LLVM_TOOLS_LLVM_MCA_SCHEDULER_H
 
-#include "HWEventListener.h"
 #include "HardwareUnit.h"
 #include "Instruction.h"
 #include "LSUnit.h"
-#include "RetireControlUnit.h"
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/SmallVector.h"
@@ -387,14 +385,22 @@ public:
         LSU(llvm::make_unique<LSUnit>(LoadQueueSize, StoreQueueSize,
                                       AssumeNoAlias)) {}
 
+  // Stalls generated by the scheduler.
+  enum StallKind {
+    NoStall,
+    LoadQueueFull,
+    StoreQueueFull,
+    SchedulerQueueFull,
+    DispatchGroupStall
+  };
+
   /// Check if the instruction in 'IR' can be dispatched.
   ///
   /// The DispatchStage is responsible for querying the Scheduler before
   /// dispatching new instructions. This routine is used for performing such
   /// a query.  If the instruction 'IR' can be dispatched, then true is
   /// returned, otherwise false is returned with Event set to the stall type.
-  bool canBeDispatched(const InstRef &IR,
-                       HWStallEvent::GenericEventType &Event) const;
+  bool canBeDispatched(const InstRef &IR, StallKind &Event) const;
 
   /// Returns true if there is availibility for IR in the LSU.
   bool isReady(const InstRef &IR) const { return LSU->isReady(IR); }