diff options
Diffstat (limited to 'llvm/tools/llvm-mca/RetireControlUnit.cpp')
| -rw-r--r-- | llvm/tools/llvm-mca/RetireControlUnit.cpp | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/llvm/tools/llvm-mca/RetireControlUnit.cpp b/llvm/tools/llvm-mca/RetireControlUnit.cpp index bd0fc28c6ba..da93c2c11c1 100644 --- a/llvm/tools/llvm-mca/RetireControlUnit.cpp +++ b/llvm/tools/llvm-mca/RetireControlUnit.cpp @@ -28,7 +28,7 @@ RetireControlUnit::RetireControlUnit(const llvm::MCSchedModel &SM, } // Reserves a number of slots, and returns a new token. -unsigned RetireControlUnit::reserveSlot(unsigned Index, unsigned NumMicroOps) { +unsigned RetireControlUnit::reserveSlot(const InstRef &IR, unsigned NumMicroOps) { assert(isAvailable(NumMicroOps)); unsigned NormalizedQuantity = std::min(NumMicroOps, static_cast<unsigned>(Queue.size())); @@ -37,7 +37,7 @@ unsigned RetireControlUnit::reserveSlot(unsigned Index, unsigned NumMicroOps) { // resources, they still consume one slot in the retire queue. NormalizedQuantity = std::max(NormalizedQuantity, 1U); unsigned TokenID = NextAvailableSlotIdx; - Queue[NextAvailableSlotIdx] = {Index, NormalizedQuantity, false}; + Queue[NextAvailableSlotIdx] = {IR, NormalizedQuantity, false}; NextAvailableSlotIdx += NormalizedQuantity; NextAvailableSlotIdx %= Queue.size(); AvailableSlots -= NormalizedQuantity; @@ -54,9 +54,10 @@ void RetireControlUnit::cycleEvent() { break; RUToken &Current = Queue[CurrentInstructionSlotIdx]; assert(Current.NumSlots && "Reserved zero slots?"); + assert(Current.IR.isValid() && "Invalid RUToken in the RCU queue."); if (!Current.Executed) break; - Owner->notifyInstructionRetired(Current.Index); + Owner->notifyInstructionRetired(Current.IR); CurrentInstructionSlotIdx += Current.NumSlots; CurrentInstructionSlotIdx %= Queue.size(); AvailableSlots += Current.NumSlots; @@ -66,7 +67,7 @@ void RetireControlUnit::cycleEvent() { void RetireControlUnit::onInstructionExecuted(unsigned TokenID) { assert(Queue.size() > TokenID); - assert(Queue[TokenID].Executed == false && Queue[TokenID].Index != ~0U); + assert(Queue[TokenID].Executed == false && Queue[TokenID].IR.isValid()); Queue[TokenID].Executed = true; } |
