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-rw-r--r--llvm/tools/llvm-mca/Dispatch.h63
1 files changed, 1 insertions, 62 deletions
diff --git a/llvm/tools/llvm-mca/Dispatch.h b/llvm/tools/llvm-mca/Dispatch.h
index 146cfc0edea..205c12c3079 100644
--- a/llvm/tools/llvm-mca/Dispatch.h
+++ b/llvm/tools/llvm-mca/Dispatch.h
@@ -17,6 +17,7 @@
#define LLVM_TOOLS_LLVM_MCA_DISPATCH_H
#include "Instruction.h"
+#include "RetireControlUnit.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include <map>
@@ -155,68 +156,6 @@ public:
#endif
};
-/// tracks which instructions are in-flight (i.e. dispatched but not
-/// retired) in the OoO backend.
-///
-/// This class checks on every cycle if/which instructions can be retired.
-/// Instructions are retired in program order.
-/// In the event of instruction retired, the DispatchUnit object that owns
-/// this RetireControlUnit gets notified.
-/// On instruction retired, register updates are all architecturally
-/// committed, and any temporary registers originally allocated for the
-/// retired instruction are freed.
-struct RetireControlUnit {
- // A "token" (object of class RUToken) is created by the retire unit for every
- // instruction dispatched to the schedulers. Flag 'Executed' is used to
- // quickly check if an instruction has reached the write-back stage. A token
- // also carries information related to the number of entries consumed by the
- // instruction in the reorder buffer. The idea is that those entries will
- // become available again once the instruction is retired. On every cycle,
- // the RCU (Retire Control Unit) scans every token starting to search for
- // instructions that are ready to retire. retired. Instructions are retired
- // in program order. Only 'Executed' instructions are eligible for retire.
- // Note that the size of the reorder buffer is defined by the scheduling model
- // via field 'NumMicroOpBufferSize'.
- struct RUToken {
- unsigned Index; // Instruction index.
- unsigned NumSlots; // Slots reserved to this instruction.
- bool Executed; // True if the instruction is past the WB stage.
- };
-
-private:
- unsigned NextAvailableSlotIdx;
- unsigned CurrentInstructionSlotIdx;
- unsigned AvailableSlots;
- unsigned MaxRetirePerCycle; // 0 means no limit.
- std::vector<RUToken> Queue;
- DispatchUnit *Owner;
-
-public:
- RetireControlUnit(const llvm::MCSchedModel &SM, DispatchUnit *DU);
-
- bool isFull() const { return !AvailableSlots; }
- bool isEmpty() const { return AvailableSlots == Queue.size(); }
- bool isAvailable(unsigned Quantity = 1) const {
- // Some instructions may declare a number of uOps which exceedes the size
- // of the reorder buffer. To avoid problems, cap the amount of slots to
- // the size of the reorder buffer.
- Quantity = std::min(Quantity, static_cast<unsigned>(Queue.size()));
- return AvailableSlots >= Quantity;
- }
-
- // Reserves a number of slots, and returns a new token.
- unsigned reserveSlot(unsigned Index, unsigned NumMicroOps);
-
- /// Retires instructions in program order.
- void cycleEvent();
-
- void onInstructionExecuted(unsigned TokenID);
-
-#ifndef NDEBUG
- void dump() const;
-#endif
-};
-
// Implements the hardware dispatch logic.
//
// This class is responsible for the dispatch stage, in which instructions are
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