diff options
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/Hexagon/trap-crash.ll | 20 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Hexagon/trap-unreachable.ll | 4 |
2 files changed, 23 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/Hexagon/trap-crash.ll b/llvm/test/CodeGen/Hexagon/trap-crash.ll new file mode 100644 index 00000000000..e940d98b620 --- /dev/null +++ b/llvm/test/CodeGen/Hexagon/trap-crash.ll @@ -0,0 +1,20 @@ +; RUN: llc -march=hexagon < %s | FileCheck %s + +; Generate code that is guaranteed to crash. At the moment, it's a +; misaligned load. +; CHECK: memd(##3134984174) + +target triple = "hexagon" + +; Function Attrs: noreturn nounwind +define i32 @f0() #0 { +entry: + tail call void @llvm.trap() + unreachable +} + +; Function Attrs: cold noreturn nounwind +declare void @llvm.trap() #1 + +attributes #0 = { noreturn nounwind "target-cpu"="hexagonv60" } +attributes #1 = { cold noreturn nounwind } diff --git a/llvm/test/CodeGen/Hexagon/trap-unreachable.ll b/llvm/test/CodeGen/Hexagon/trap-unreachable.ll index 124b37a5c6c..b14f1e3c1a5 100644 --- a/llvm/test/CodeGen/Hexagon/trap-unreachable.ll +++ b/llvm/test/CodeGen/Hexagon/trap-unreachable.ll @@ -1,5 +1,7 @@ ; RUN: llc -march=hexagon -trap-unreachable < %s | FileCheck %s -; CHECK: trap + +; Trap is implemented via a misaligned load. +; CHECK: memd(##3134984174) define void @fred() #0 { unreachable |
