3 files changed, 5 insertions, 26 deletions
diff --git a/llvm/test/Transforms/InstCombine/abs_abs.ll b/llvm/test/Transforms/InstCombine/abs_abs.ll
index 10aec3678fb..18c7ee36666 100644
--- a/llvm/test/Transforms/InstCombine/abs_abs.ll
+++ b/llvm/test/Transforms/InstCombine/abs_abs.ll
@@ -1,4 +1,3 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -instcombine -S | FileCheck %s
 
 define i32 @abs_abs_x01(i32 %x) {
@@ -16,16 +15,12 @@ define i32 @abs_abs_x01(i32 %x) {
 ; CHECK-NEXT: ret i32 [[SEL]]
 }
 
-; FIXME - vectors should get the same folds
 define <2 x i32> @abs_abs_x01_vec(<2 x i32> %x) {
 ; CHECK-LABEL: @abs_abs_x01_vec(
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <2 x i32> %x, <i32 -1, i32 -1>
 ; CHECK-NEXT:    [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, %x
 ; CHECK-NEXT:    [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> %x, <2 x i32> [[SUB]]
-; CHECK-NEXT:    [[CMP1:%.*]] = icmp sgt <2 x i32> [[COND]], <i32 -1, i32 -1>
-; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
-; CHECK-NEXT:    [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[COND]], <2 x i32> [[SUB16]]
-; CHECK-NEXT:    ret <2 x i32> [[COND18]]
+; CHECK-NEXT:    ret <2 x i32> [[COND]]
 ;
   %cmp = icmp sgt <2 x i32> %x, <i32 -1, i32 -1>
   %sub = sub nsw <2 x i32> zeroinitializer, %x
@@ -81,16 +76,12 @@ define i32 @abs_abs_x04(i32 %x) {
 ; CHECK-NEXT: ret i32 [[SEL]]
 }
 
-; FIXME - vectors should get the same folds
 define <2 x i32> @abs_abs_x04_vec(<2 x i32> %x) {
 ; CHECK-LABEL: @abs_abs_x04_vec(
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <2 x i32> %x, <i32 1, i32 1>
 ; CHECK-NEXT:    [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, %x
 ; CHECK-NEXT:    [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> %x
-; CHECK-NEXT:    [[CMP1:%.*]] = icmp sgt <2 x i32> [[COND]], <i32 -1, i32 -1>
-; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
-; CHECK-NEXT:    [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[COND]], <2 x i32> [[SUB16]]
-; CHECK-NEXT:    ret <2 x i32> [[COND18]]
+; CHECK-NEXT:    ret <2 x i32> [[COND]]
 ;
   %cmp = icmp slt <2 x i32> %x, <i32 1, i32 1>
   %sub = sub nsw <2 x i32> zeroinitializer, %x
diff --git a/llvm/test/Transforms/InstCombine/select.ll b/llvm/test/Transforms/InstCombine/select.ll
index c03e03a13b6..207bbc1f4bf 100644
--- a/llvm/test/Transforms/InstCombine/select.ll
+++ b/llvm/test/Transforms/InstCombine/select.ll
@@ -1,4 +1,3 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -instcombine -S | FileCheck %s
 
 ; PR1822
@@ -1724,15 +1723,9 @@ define i32 @test_max_of_min(i32 %a) {
   ret i32 %s1
 }
 
-; FIXME - vectors should get the same folds
 define <2 x i32> @test_max_of_min_vec(<2 x i32> %a) {
 ; CHECK-LABEL: @test_max_of_min_vec(
-; CHECK-NEXT:    [[NOT_A:%.*]] = xor <2 x i32> %a, <i32 -1, i32 -1>
-; CHECK-NEXT:    [[C0:%.*]] = icmp sgt <2 x i32> %a, zeroinitializer
-; CHECK-NEXT:    [[S0:%.*]] = select <2 x i1> [[C0]], <2 x i32> [[NOT_A]], <2 x i32> <i32 -1, i32 -1>
-; CHECK-NEXT:    [[C1:%.*]] = icmp sgt <2 x i32> [[S0]], <i32 -1, i32 -1>
-; CHECK-NEXT:    [[S1:%.*]] = select <2 x i1> [[C1]], <2 x i32> [[S0]], <2 x i32> <i32 -1, i32 -1>
-; CHECK-NEXT:    ret <2 x i32> [[S1]]
+; CHECK-NEXT:    ret <2 x i32> <i32 -1, i32 -1>
 ;
   %not_a = xor <2 x i32> %a, <i32 -1, i32 -1>
   %c0 = icmp sgt <2 x i32> %a, zeroinitializer
diff --git a/llvm/test/Transforms/InstCombine/select_meta.ll b/llvm/test/Transforms/InstCombine/select_meta.ll
index 26b49f6f952..618713424ca 100644
--- a/llvm/test/Transforms/InstCombine/select_meta.ll
+++ b/llvm/test/Transforms/InstCombine/select_meta.ll
@@ -1,4 +1,3 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -instcombine -S | FileCheck %s
 
 define i32 @foo(i32) local_unnamed_addr #0  {
@@ -81,16 +80,12 @@ define i32 @abs_nabs_x01(i32 %x) {
 ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]], !prof ![[MD1]]
 }
 
-; FIXME - vectors should get the same folds
 define <2 x i32> @abs_nabs_x01_vec(<2 x i32> %x) {
 ; CHECK-LABEL: @abs_nabs_x01_vec(
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <2 x i32> %x, <i32 -1, i32 -1>
 ; CHECK-NEXT:    [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, %x
-; CHECK-NEXT:    [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> %x, !prof !0
-; CHECK-NEXT:    [[CMP1:%.*]] = icmp sgt <2 x i32> [[COND]], <i32 -1, i32 -1>
-; CHECK-NEXT:    [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[COND]]
-; CHECK-NEXT:    [[COND18:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[COND]], <2 x i32> [[SUB16]], !prof !2
-; CHECK-NEXT:    ret <2 x i32> [[COND18]]
+; CHECK-NEXT:    [[COND1:%.*]] = select <2 x i1> [[CMP]], <2 x i32> %x, <2 x i32> [[SUB]], !prof ![[MD1]]
+; CHECK-NEXT:    ret <2 x i32> [[COND1]]
 ;
   %cmp = icmp sgt <2 x i32> %x, <i32 -1, i32 -1>
   %sub = sub nsw <2 x i32> zeroinitializer, %x