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-rw-r--r--llvm/test/CodeGen/X86/GlobalISel/inttoptr.ll12
-rw-r--r--llvm/test/CodeGen/X86/GlobalISel/x86-legalize-inttoptr.mir39
-rw-r--r--llvm/test/CodeGen/X86/GlobalISel/x86-select-inttoptr.mir39
-rw-r--r--llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-inttoptr.mir35
-rw-r--r--llvm/test/CodeGen/X86/GlobalISel/x86_64-select-inttoptr.mir36
5 files changed, 161 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/GlobalISel/inttoptr.ll b/llvm/test/CodeGen/X86/GlobalISel/inttoptr.ll
new file mode 100644
index 00000000000..c03d1af532d
--- /dev/null
+++ b/llvm/test/CodeGen/X86/GlobalISel/inttoptr.ll
@@ -0,0 +1,12 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=CHECK
+
+define i64* @inttoptr_p0_s64(i64 %val) {
+; CHECK-LABEL: inttoptr_p0_s64:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: movq %rdi, %rax
+; CHECK-NEXT: retq
+entry:
+ %0 = inttoptr i64 %val to i64*
+ ret i64* %0
+}
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-inttoptr.mir b/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-inttoptr.mir
new file mode 100644
index 00000000000..1170872122a
--- /dev/null
+++ b/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-inttoptr.mir
@@ -0,0 +1,39 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=i686-linux-gnu -global-isel -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
+
+--- |
+
+ define i32* @inttoptr_p0_s32(i32 %val) {
+ entry:
+ %0 = inttoptr i32 %val to i32*
+ ret i32* %0
+ }
+
+...
+---
+name: inttoptr_p0_s32
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+frameInfo:
+ maxAlignment: 4
+fixedStack:
+ - { id: 0, size: 4, alignment: 16, stack-id: 0, isImmutable: true }
+body: |
+ bb.1.entry:
+ ; CHECK-LABEL: name: inttoptr_p0_s32
+ ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
+ ; CHECK: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load 4 from %fixed-stack.0, align 0)
+ ; CHECK: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[LOAD]](s32)
+ ; CHECK: $eax = COPY [[INTTOPTR]](p0)
+ ; CHECK: RET 0, implicit $eax
+ %1:_(p0) = G_FRAME_INDEX %fixed-stack.0
+ %0:_(s32) = G_LOAD %1(p0) :: (invariant load 4 from %fixed-stack.0, align 0)
+ %2:_(p0) = G_INTTOPTR %0(s32)
+ $eax = COPY %2(p0)
+ RET 0, implicit $eax
+
+...
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86-select-inttoptr.mir b/llvm/test/CodeGen/X86/GlobalISel/x86-select-inttoptr.mir
new file mode 100644
index 00000000000..7657b2db351
--- /dev/null
+++ b/llvm/test/CodeGen/X86/GlobalISel/x86-select-inttoptr.mir
@@ -0,0 +1,39 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=i386-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
+
+--- |
+
+ define i32* @inttoptr_p0_s32(i32 %val) {
+ entry:
+ %0 = inttoptr i32 %val to i32*
+ ret i32* %0
+ }
+
+...
+---
+name: inttoptr_p0_s32
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: gpr }
+ - { id: 1, class: gpr }
+ - { id: 2, class: gpr }
+frameInfo:
+ maxAlignment: 4
+fixedStack:
+ - { id: 0, size: 4, alignment: 16, stack-id: 0, isImmutable: true }
+body: |
+ bb.1.entry:
+ ; CHECK-LABEL: name: inttoptr_p0_s32
+ ; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load 4 from %fixed-stack.0, align 0)
+ ; CHECK: $eax = COPY [[MOV32rm]]
+ ; CHECK: RET 0, implicit $eax
+ %1:gpr(p0) = G_FRAME_INDEX %fixed-stack.0
+ %0:gpr(s32) = G_LOAD %1(p0) :: (invariant load 4 from %fixed-stack.0, align 0)
+ %2:gpr(p0) = G_INTTOPTR %0(s32)
+ $eax = COPY %2(p0)
+ RET 0, implicit $eax
+
+...
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-inttoptr.mir b/llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-inttoptr.mir
new file mode 100644
index 00000000000..7880303ec95
--- /dev/null
+++ b/llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-inttoptr.mir
@@ -0,0 +1,35 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
+
+--- |
+
+ define i64* @inttoptr_p0_s64(i64 %val) {
+ entry:
+ %0 = inttoptr i64 %val to i64*
+ ret i64* %0
+ }
+
+...
+---
+name: inttoptr_p0_s64
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+body: |
+ bb.1.entry:
+ liveins: $rdi
+
+ ; CHECK-LABEL: name: inttoptr_p0_s64
+ ; CHECK: liveins: $rdi
+ ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $rdi
+ ; CHECK: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[COPY]](s64)
+ ; CHECK: $rax = COPY [[INTTOPTR]](p0)
+ ; CHECK: RET 0, implicit $rax
+ %0:_(s64) = COPY $rdi
+ %1:_(p0) = G_INTTOPTR %0(s64)
+ $rax = COPY %1(p0)
+ RET 0, implicit $rax
+
+...
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-inttoptr.mir b/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-inttoptr.mir
new file mode 100644
index 00000000000..06c26c3aec0
--- /dev/null
+++ b/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-inttoptr.mir
@@ -0,0 +1,36 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
+
+--- |
+
+ define i64* @inttoptr_p0_s64(i64 %val) {
+ entry:
+ %0 = inttoptr i64 %val to i64*
+ ret i64* %0
+ }
+
+...
+---
+name: inttoptr_p0_s64
+alignment: 4
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: gpr }
+ - { id: 1, class: gpr }
+body: |
+ bb.1.entry:
+ liveins: $rdi
+
+ ; CHECK-LABEL: name: inttoptr_p0_s64
+ ; CHECK: liveins: $rdi
+ ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
+ ; CHECK: $rax = COPY [[COPY]]
+ ; CHECK: RET 0, implicit $rax
+ %0:gpr(s64) = COPY $rdi
+ %1:gpr(p0) = G_INTTOPTR %0(s64)
+ $rax = COPY %1(p0)
+ RET 0, implicit $rax
+
+...
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